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LP-AM243: Multi task process, 1 for IPC another one is reset_isolation

coderAkdr
Prodigy 210 points
Part Number: LP-AM243


Tool/software:

Hello;

In the project I created, while running the reset_isolation example with 1 task on the m4 core, I am messaging with all the other cores with the other task. However, after a while, I notice that messaging stops in one task and the SW3 (Main Reset) interrupt is not caught in the other task. I wonder if there is a problem when the following method is used from the other task while IPC messaging is being done.

status = SOC_enableResetIsolation (pscMain2MCUDisable, pscMCU2MainDisable, \
debugIsolationEnable);

Also, when I make DebugP_log from two separate tasks, I see that one of them is definitely not working. Is it possible to use this simultaneously in both tasks?

Regards
Kadir

  • +1
    TI__Guru 54288 points

    Hi Kadir,

    Thanks for your query.

    As per the above description, I understand that M4F core is sending messages to all other cores. But after some time Main reset is not getting triggered.

    Is my understanding correct?

    coderAkdr said:
    I notice that messaging stops in one task and the SW3 (Main Reset) interrupt is not caught in the other task

    How are you resetting the SoC?

    Is the example flashed using SBL binary or you are using CCS for running the application?

    Please refer RESET_ISOLATION_IPC for details.

    coderAkdr said:
    Also, when I make DebugP_log from two separate tasks, I see that one of them is definitely not working. Is it possible to use this simultaneously in both tasks?

    Are you using the DebugP_log API from ISR?

    Regards,

    Tushar

  • 0 in reply to Tushar Thakur
    Prodigy 210 points

    Hi Tushar;

    Thanks for your responses, after your message I ported RESET_ISOLATION_IPC into my project.

    Differently example I use all cores not only r5-00 and m4. in the r5 1-1, 1-0, 0-1 side the code respectively follows that IPC syncALL method, RPMessage Receive and RP Message Send (Same message). As I mentioned r5 0-0 and m4 cores runs same example project. (I only configured GPIOs because of difference between Lp-Am243x and EVM).

    The problem I encountered is that;
    When I push SW3 (Main Reset) M4 catch the interrupt and sends reset signal to MAIN domain. Then r5-0-0 and r5-01 reset successfully. But it is not successful for r5 1-0 and 1-1. It only waits in "IN RESET" state and does not pass to "RUNNING"

    Do you have any assumption/recommendation?

     

  • +1 in reply to coderAkdr
    TI__Guru 54288 points

    Hi Kadir, 

    I can see that you are using CCS to load example on each core. The reset isolation example will not work in this way.

    Can you please try flashing the example as described in GETTING_STARTED_FLASH guide and update the results?

    Please refer below image.

    Regards,

    Tushar