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AM2634: WARMRSTN isn't working

Rohal
Intellectual 495 points

Part Number: AM2634

Tool/software:

Dear Team,

I' using AM2634 eval board with RESTn and PORz switchs,

when PORz press MCU rest occur - its working fine

but whenever RESTn button is pressed nothing happening - its not working  

kindly let me know what the purpose of WARMRSTN pin,

how to reset by this pin 

  • 0
    TI__Expert 6156 points

    Hello,

    PORz switch is used to trigger a POR reset and RESETn is used to trigger a Warm Reset. Please see chapter 6.3 in the device TRM (AM263x SitaraTm Microcontroller Technical Reference Manual (Rev. G) (ti.com)) to understand the difference between the 2 resets. May I know what you're looking for in your end use-case, so that I can suggest appropriate reset.

    Thanks,

    Sahana

  • 0 in reply to Sahana H G
    Intellectual 495 points

    Thanks for your reply, 

    my question  is "What is WARM IMPUT REQUECT" as shown in the attached image

    2. how its trigger the system reset

    3. whats the outcome if WARMRSTn pin is low?

    4. As per document this pin is I/O pin as well, please let me know how to use this pin as system reset 

  • 0 in reply to Rohal
    TI__Expert 6156 points

    Warm reset resets all the logic except those which are sensitive only to PORz (example, memories and few register spaces). This would be useful in-case you want to retain the memory contents after reset.  The ROM Bootloader executes after every PORz or Warm reset.

    WARMRSTn pin is I/O as it acts as both input as well as status pin. While acting as status pin (open drain), it can be used to know whether PORz input has been propagated to the system, as the POR assertion also asserts the WARMRSTn PAD as shown in the below diagram.

    When WARMRSTn pin is low, it means Warm reset is asserted.

  • 0 in reply to Sahana H G
    Intellectual 495 points

    I want to reset the MCU by external watchdog Timer IC,

    please let me Know which pin have to use to reset the MCU(PORz = R2 or WARMRSTn = C3)

    if you are suggesting WARMRSTn 

    then how to configure this pin for MCU reset

  • 0 in reply to Rohal
    TI__Expert 6156 points

    Typically it is provided to PORz pin. Under what conditions are you planning to reset the MCU by external watchdog timer IC, could you please clarify?

  • 0 in reply to Sahana H G
    Intellectual 495 points

    let suppose for some reason MCU firmware is stuck in infinite loop,

    So in that case we have to reset the MCU 

    Can you please let me know how to configure WARMRSTn pin to reset the MCU

  • 0 in reply to Rohal
    TI__Expert 6156 points
    Rohal said:
    Can you please let me know how to configure WARMRSTn pin to reset the MCU

    There's no additional configuration required as such, you should be able to assert it by just toggling the pin.

    Regards,

    Sahana

  • 0 in reply to Sahana H G
    Intellectual 495 points

    No, I think not like that

    My question is How to configure HARMRSTn pin as input (Warm reset request) not warm reset status

  • 0 in reply to Rohal
    TI__Expert 6156 points

    Hello,

    I'm checking on this and the expert is on leave, please expect a response in 1-2 days.

    Thanks,

    Sahana

  • 0 in reply to Rohal
    TI__Expert 6156 points

    Hi Rohal,

    Please configure the register WARM_RESET_CONFIG under TOP_RCM (Address 0x53200028) bits 2:0 to 000 (see snippet below) for the Warm Reset pin to have control over warm reset (it is bypassed by default).

    Let me know if this solves your query.

    Thanks,

    Sahana

  • +1 in reply to Sahana H G
    Intellectual 495 points

    Thanks Sahana for your support and efforts

     I used  SOC_configureWarmResetSource(SOC_WarmResetCause_POWER_ON_RESET);

    api in my source code, now WARMRST is working for me,

    please confirm is it a good way to implement 

  • 0 in reply to Rohal
    TI__Expert 6156 points
    Rohal said:
    SOC_configureWarmResetSource(SOC_WarmResetCause_POWER_ON_RESET);

    The parameter of the API is wrong. According to the register description attached in my previous reply, bits 0:2 need to be set to 7 in-order to enable the warm reset pad. This is not available as a configuration in the header file, I will file an internal bug to resolve this. However, please manually use a configuration for this register based on your need (for example, the default value of this register is 0x77777777u, if you just want to enable external warm reset then please write 0x77777770u as a parameter) for this API.

    Thanks,

    Sahana

  • +1 in reply to Sahana H G
    Intellectual 495 points

    As you mention WARM_RESET_CONFIG resister address is 0x53200028 but its not it is 0x53200004 , please correct if I'm wrong.  

    i think correct solution is 

    SOC_configureWarmResetSource(0x77770070);  // keep it default, only masking LSB 3 bit

  • +1 in reply to Rohal
    TI__Expert 6156 points

    Sorry about the wrong address, yes you're right it is 0x53200004. But the correct value for the API would be SOC_configureWarmResetSource(0x77777770); // keep it default, only masking LSB 3 bit