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[FAQ] AM2434: A DC steady-state condition is not allowed on MCU_OSC0_XI

Hideaki Matsumoto
Genius 9480 points
Part Number: AM2434
Other Parts Discussed in Thread: LMK1C1104

Tool/software:

Hi,

 

There is the description “A DC steady-state condition is not allowed on MCU_OSC0_XI when the oscillator is powered up.” at 6.10.4.1.2 MCU_OSC0 LVCMOS Digital Clock Source in the datasheet.

 

Why is inversion logic necessary?

Is there a problem with C-cut (C-coupling) instead of inverting logic?

 

On the EVM, the output of the CDCLVC1310RHBR is input directly to the AM2434.

Is this because no DC is applied from the output of CDCLVC1310RHBR ?

 

In the above case, if the clock buffer and oscillator outputs are not DC steady-state,

Is it OK to input directly from the clock IC to the AM2434?

 

Thanks and regards,

Hideaki

  • 0
    TI__Guru 63385 points

    The inverter shown in the diagram was meant to represent an LVCMOS output, where the LVCMOS output could be the oscillator output buffer, or the LVCMOS output from some clock distribution device. There is no requirement to invert the clock source.

    Regards,
    Paul

      

  • 0 in reply to peaves
    TI__Genius 9480 points

    Hi Paul,

    Thank you for your quick response. That's really helpful.

    peaves said:
    There is no requirement to invert the clock source.

    Understood. That's good information.

    The customer is still concerned about the description that "DC steady-state condition is not allowed." 

    Is it no problem that LMK1C1104 and LMK6CE02500 are directly connected to MCU_OSC0_XI like below ? or Should C-cut (C coupling) be needed ?

    Thanks and regards,

    Hideaki

  • 0 in reply to Hideaki Matsumoto
    TI__Guru 63385 points

    You should connect the 1.8V LVCMOS clock source output directly to the XI pin and connect the XO pin to VSS.

    There are internal AC coupling capacitors in both of the XI and XO signal paths that connect to an internal comparator that creates a square wave from the crystal circuit oscillation. A DC steady-state condition on the XI pin relative to the XO pin would allow the comparator to generate glitches on the internal clock tree of the device and cause it to do unpredictable things.

    Regards,
    Paul