AM2432: *.out file cannot be loaded by CCS software

cheng guo

Part Number: AM2432

Tool/software:

Based on hello_world project in the SDK, we use a third-party compiler to compile *.out file. However, when we load this *.out file by using CCS software, a data verification error occured.

I have confirmed the use of the compiler with a third-party compiler vendor, but I am not sure if the compiled *.out file format is available on the AM2432 platform or if there is a problem with the file loading mechanism in CCS, so I would like to ask for advice, and any comments would be greatly appreciated

10 months ago

0 cheng guo 10 months ago

Prodigy 190 points

Reconfirm with the third-party compiler vendor that the compiler can support the AM2432 platform

0 Vaibhav Kumar 10 months ago

TI__Mastermind 45486 points

Hello Cheng,

I have assigned this thread to the correct expert.

Please look at data verification errors and the possible causes: https://software-dl.ti.com/ccs/esd/documents/troubleshooting-data_verification_errors.html

Also make sure the SoC is initialized correctly. Please read through the procedure to initialize the SoC: https://software-dl.ti.com/mcu-plus-sdk/esd/AM243X/latest/exports/docs/api_guide_am243x/EVM_SETUP_PAGE.html#EVM_FLASH_SOC_INIT

Regards,

Vaibhav

0 cheng guo 10 months ago in reply to Vaibhav Kumar

Prodigy 190 points

Thanks for your reply. After checking, the following information is obtained as follows.

1. The terminal displayed this message when data verificationerror occured

Code Generation Tools

The content of my *.ld file is

__STACK_SIZE=0x4000;
__HEAP_SIZE=0x8000;

MEMORY
{
    M4F_VECS   : org = 0x0 , len = 0x200 
    M4F_IRAM   : org = 0x200 , len = 0x2BE00
    STACK   : org = 0x2C000 , len = 0x4000 
    M4F_DRAM   : org = 0x30000 , len = 0x10000
    USER_SHM_MEM   : org = 0x70100000 , len = 0x180 
    LOG_SHM_MEM   : org = 0x701D0180 , len = 0x3E80 
    IPC_VRING_MEM   : org = 0x701D4000 , len = 0xC000 

    /* For memory Regions not defined in this core but shared by other cores with the current core */
}


SECTIONS
{
    GROUP : {
        .vectors ALIGN(8) : {
            KEEP(*(.vectors))
        }
    } > M4F_VECS 

    GROUP : {
        .text ALIGN(8) : {
            *(.text._c_int00)
            *(.text)
            *(.init) 
            *(.fini)
        }

        .ctors (=TEXT) ALIGN(8) : { ctordtor.o(.ctors) *(.ctors) }
        .dtors (=TEXT) ALIGN(8) : { ctordtor.o(.dtors) *(.dtors) }

        .text.boot ALIGN(8) : {
        }
        .text.hwi ALIGN(8) : {
        }
        .text.mpu ALIGN(8) : {
        }

        .text.__TI_auto_init ALIGN(8) : {
        }
        .text.__TI_auto_init_nobinit ALIGN(8) : {
        }
        .text.__TI_auto_init_nopinit ALIGN(8) : {
        }
        .text.__TI_auto_init_nobinit_nopinit ALIGN(8) : {
        }
        .text.__TI_auto_init_hold_wdt ALIGN(8) : {
        }
        .text.__TI_auto_init_nobinit_hold_wdt ALIGN(8) : {
        }
        .text.__TI_auto_init_nopinit_hold_wdt ALIGN(8) : {
        }
        .text.__TI_auto_init_nobinit_nopinit_hold_wdt ALIGN(8) : {
        }
        .text.__TI_auto_init_warm ALIGN(8) : {
        }

        .sysmem ALIGN(8) : {
        }
        .ARM.exidx ALIGN(8) : {
        }
        .init_array ALIGN(8) : {
        }
        .fini_array ALIGN(8) : {
        }
        __HEAP_START = .;
        . = . + __HEAP_SIZE;
        __HEAP_END = .;
    } > M4F_IRAM

    GROUP : {
        .stack ALIGN(8) : {
        }
    } > STACK

    GROUP : {
        .bss ALIGN(8) : {
            __BSS_START = .;
            *(.bss)
            __BSS_END = .; 
        }

        .bss._CIOBUF_ ALIGN(8) : {
        }

        .data ALIGN(8) : {
        }
        .rodata ALIGN(8) : {
        }
        .rodata.cfg ALIGN(8) : {
        }
        .rodata.cst32 ALIGN(8) : {
        }
        .rodata.str1.1 ALIGN(8) : {
        }
    } > M4F_DRAM

    GROUP : {
        .bss.user_shared_mem (NOLOAD) : {
        }
    } > USER_SHM_MEM    

    GROUP : {
        .bss.log_shared_mem (NOLOAD) : {
        }
    } > LOG_SHM_MEM    

    GROUP : {
        .bss.ipc_vring_mem (NOLOAD) : {
        }
    } > IPC_VRING_MEM    
}

__STACK_END = ADDR(STACK) + SIZEOF(STACK);

__SP_INIT      = ADDR(STACK) + SIZEOF(STACK);
__SP_END       = ADDR(STACK);

and the generated *.map file contains the following

Link editor command file symbols
                   __STACK_SIZE 00004000
                    __HEAP_SIZE 00008000
                   __HEAP_START 00008f24
                     __HEAP_END 00010f24
                    __BSS_START 00030000
                      __BSS_END 000308a8
                    __STACK_END 00030000
                      __SP_INIT 00030000
                       __SP_END 0002c000

So the memory distribution in the linker command file follows the board.