This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

MSPM0L1306-Q1: I2C implementation vi PA18 and PA19

Genius 17485 points
Part Number: MSPM0L1306-Q1
Other Parts Discussed in Thread: MSPM0G3107-Q1

Tool/software:

Hi Experts,

We have customer working with an MSPM0L1306-Q1 and want to use I2C on pin PA18 and PA19.

They can use fast mode, but in the software. Can also use this pin with 800 kHz for the clock. However, from the datasheet, it is not clear if this is something they can do.

From measuring it see that it works, but as we understanding, they are out of specs with this configuration. In terms of reliability, wondering if it works like this.

Thank you.

Regards,
Archie A.

  • Hello Archie,

    I don't understand which spec you think is being violated. Can you clarify the spec you are concerned about? 

    MSPM0Lxx I2C SCL can go up to 1MHz, so 800kHz is okay.  

    Also, quickly looking at the datasheet, I see PA18 and PA19 are both I2C1_SDA pins.  The I2C1_SCL pin is on PA20.  Can you double check the pins being used?  

    Thanks,

    JD

  • Hi JD,

    Thank you for your support.

    Im sorry there was a little mistake. We are using the MSPM0G3107-Q1 MCU in the 20 VSSOP package, with PA18 configured as SDA and PA17 as SCL.

    In the datasheet under section 8.2, it states that I2C is supported up to 400 Kbit/s, and also up to 1 Mbit/s, but only on open-drain IOs (ODIO) and high-drive IOs (HDIO).

    From table 6.1, I see that PA17 and PA18 are not classified as ODIO or HDIO, so they are not officially specified to support 1 Mbit/s. However, in the software, I can set the clock to 800 kHz, and it seems to work. As far as I understand, these pins are only rated for 400 Kbit/s.

    My question is: Will using an 800 kHz clock for SCL on PA17 have any impact on reliability?

    Regards,
    Archie A.

  • Hello Archie,

    I found what the customer's comment refers to in section 8.20 of the Datasheet.   

    I spoke with my Systems team, and the reason for this is because the I2C Specification defines FM+ devices as having the ability to sink up to 20mA of current. The SDIO pins have an absolute max rating of 6 mA.  So this is why that note exists.  

    Now, In my opinion, 6mA definitely can work.  The I2C spec does give the equations and timings to calculated the minimum and maximum pull-up resistor values.  I believe the risk is that if you plug into another I2C buss also has stronger pull-ups, or even pull-ups in parallel, then you could possible exceed this max current would could damage or reduce the lifetime of the device. 

    If the I2C bus is fully contained on board, and the pull-up resistance is fixed and controlled to guarantee that this doesn't happen, then I think it's fine. 

    Hopefully this explanation explains exactly where this note comes from and provides all context to make a decision for the customer's application. 

    Thanks,

    JD  

  • Thank you, JD, for this detailed support.

    This helps a lot.

    Regards,
    Archie A.