Tool/software:
I am wondering if any of the MSPM0+ devices support a feature similar to the Sitara PRU's Enhanced GPIO capability.
Specifically, the PRU has a "GPIO shift out" feature where you write to two ping-pong shadow registers, and the hardware automatically shifts out the bits in the shadow register, ping-ponging between them.
This allows for an indefinitely long stream of serial data with minimal CPU resources.
Do the MSPM0+ devices have a similar capability? Or some other low-power MCU by TI?
For more details on what I am asking, see "6.4.5.2.2.3.4.2 PRU EGPO Shift Out" from the AM64/24 TRM.
https://www.ti.com/lit/ug/spruim2h/spruim2h.pdf
