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AM2632: BSDL file

Part Number: AM2632


Tool/software:

Hi,
it seems that the BSDL file which we provide on our webpage is not correct. It includes only 145pins instead of 324.

Regards, Holger

https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/908/3630.AM263.bsdl

  • Hi Holger,

    That BSDL file was checked out and verified before being put on TI.com. The pin count is what is expected for BSDL file. The BSDL is a subset of the complete pinout covering LVCMOS and a couple other IO. It does not include power and ground pins. Per the device datasheet, there are 142 LVCMOS IO on the device so 145 is expected given that.

    Best Regards,

    Ralph Jacobi

  • Hi Ralph,
    the package has 324 pins, of which 160 are power pins (VCC, GND), and 164 pins are GPIOs. As you mentioned, the BSDL file has 145 pins, but the actual IC has 164 pins.
    For instance, the following pins are missing from the BSDL file (T10 - ADC2_AIN1, V9 - ADC2_AIN4, V12 - ADC1_AIN3, U11 - ADC1_AIN1, U12 - ADC1_AIN4).
    The list of missing pins is in the attached file.

    Regards, Holger

    Pin names not found in part number BSDL file
    ----------------------------------------------------
    
    A1
    A18
    D6
    D8
    D10
    D12
    E5
    E6
    E7
    E8
    E9
    E10
    E11
    E12
    E13
    E14
    E15
    F5
    F6
    F7
    F8
    F9
    F10
    F11
    F12
    F13
    F14
    G5
    G6
    G7
    G8
    G9
    G10
    G11
    G12
    G13
    G14
    H3
    H4
    H5
    H6
    H7
    H8
    H9
    H10
    H11
    H12
    H13
    H14
    H15
    J5
    J6
    J7
    J8
    J9
    J10
    J11
    J12
    J13
    J14
    J15
    J16
    K5
    K6
    K7
    K8
    K9
    K10
    K11
    K12
    K13
    K14
    L4
    L5
    L6
    L7
    L8
    L9
    L10
    L11
    L12
    L13
    L14
    L15
    M5
    M6
    M7
    M8
    M9
    M10
    M11
    M12
    M13
    M14
    N3
    N5
    N6
    N7
    N8
    N9
    N10
    N11
    N12
    N13
    N14
    N15
    P4
    P5
    P6
    P7
    P8
    P9
    P10
    P11
    P12
    P13
    P14
    R1
    R2
    R4
    R5
    R6
    R7
    R8
    R9
    R10
    R11
    R12
    R13
    R14
    R15
    T1
    T2
    T3
    T4
    T5
    T6
    T7
    T8
    T9
    T10
    T11
    T12
    T13
    T14
    T15
    U1
    U2
    U3
    U4
    U5
    U6
    U7
    U8
    U9
    U10
    U11
    U12
    U13
    U14
    U15
    U16
    V1
    V2
    V3
    V4
    V5
    V6
    V7
    V8
    V9
    V10
    V11
    V12
    V13
    V14
    V15
    V16
    V18
    

  • Hello Holger,

    Yes those pins are not included as they are not LVCMOS pins but rather AnalogCIO. BSDL does not cover AnalogCIO pins.

    Best Regards,

    Ralph Jacobi

  • Hi Jacobi,
    why is it only possible to include the LVCMOS pins? Is there a possibility to check all pins? Or another way?

    Regards, Holger

  • Hello Holger,

    Working to get more details but initial comments are that BSDL is focused on logic high/low testing for open & short tests while Analog IO needs more robust modulations not covered by the BSDL models we generate.

    Best Regards,

    Ralph Jacobi

  • Hi Jacobi,
    ok, please let me know what else we can do here.

    Regards, Holger

  • Hi Holger,

    Okay so dug into details about BSDL as a whole. The process of doing a Boundary-Scan is to test the logical I/O of a device in order to identify nets that are in bad states like perpetually open-circuit, perpetually short-circuit, etc. and the logic behind this scan is all based on digital I/O. BSDL expects digital I/O to be set as input/output/bi-directional so it can do binary testing to ensure operation. This involves looking for ON and OFF signals based on VIL/VIH trigger points.

    By definition of the BSDL standard, non-digital I/O including power and ground and analog pins are set to be linkage I/O that explicitly made unavailable for boundry-scan tests.

    I can inquire why we don't list out the ADC pins for completeness and mark them as all linkage pins, but it wouldn't change the test process at all because the ADC pins will never be tested as such pins are not part of the scope of BSDL based test cases.

    Best Regards,

    Ralph Jacobi

  • Hi Ralph,

    of course, with boundary scan only the INOUT, IN or OUT bits could be toggled. But for example, the working file attached file sprm745.bsd for TMS320F28388 contains all the ADC, VCC, GND, … balls as “linkage bit”. (see line 180 to 227 and 412 to 459).

    So this is the example how they need it.

    https://www.ti.com/product/TMS320F28388D#design-tools-simulation

    https://www.ti.com/lit/zip/sprm745

    Why is there a difference in those two BSDL-Files.

    Regards, Holger

    https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/908/5810.AM263.bsdl

    https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/908/sprm745.bsd

  • Hello Holger,

    Not fully sure I can get a concrete answer but I will check with past owners on history etc. Also answer probably isn't one I can disclose on public forum, so reach out to me offline.

    Best Regards,

    Ralph Jacobi