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Tool/software:
Hi,
My customer is asking for below DDR timing parameters for AM243x.
Where can I find them?
tDASS : time between CLK to DQS
tIS, tIH : time between CLK to ADR/CMD
tDS, tDH : time between DQS to DQ/DM
Thanks and regards,
Koichiro Tashiro
I believe these values should be defined in the DDR4 JEDEC spec.
Regards,
James
Hi James,
I thought JEDEC spec only provides memory side requirements (setup and hold).
What the customer asks is SoC side delay.
Thanks and regards,
Koichiro Tashiro
Koichiro,
all these values should be taken from the JEDEC spec, as the SoC interface will be compatible with those specs.
Regards,
James