I have a problem with the PBIST that HALCoGen generates for TMS570 and maybe someone cam help me.
- The PBIST fails on ESRAM (RAM Group 6, or 15) for 20 times and then passes on the 21st time. I am using March13N algorithm (I didn't try others). I noticed that when the test passes the CMS register changes from 0 to 1 (it is not changed by the application code). Any idea why the test fails for 20 times, then CMS is changed and it passes?
- When the test fails the RDS field in the RAMT register contains 0x96 for RAM Group 6 and 0x94 for RAM Group 15, but in the Data Sheet, Table 2-8 it sais that the value should be 20 -22. Is there a mistake in the manual? Also, the failure is for Port0 and Port1, while this RAM group is a single port. Why is that?
- In the TRM, Figure 6-2 PBIST Memory Self Test Flow Diagram there is an infinite loop, repeating the same test, when the test fails. What is the purpose for that? Is the algorithm retrying with different settings? Shouldn’t it be limited to some number of tries? The assembly code implements that diagram.
- Why the code generated with HALCoGen doesn’t execute RAM Group 15 (only 6)? What is the difference between those two groups?
- In TRM it is stated that FSRF0 and FSRF1 can only be cleared when the test is restarted using MSTGCR register, but the test retry loop of the generated code does not write to this register, yet somehow those bits get cleared on the 21st retry. Is the TRM inaccurate?
