Other Parts Discussed in Thread: LMK01801
Tool/software:
Hi TI colleague
We are designing a clk divider solution , Detailed requirment is to divide LVCMOS18 76.8MHZ refclk into LVCMOS18 38.4MHZ (low additive jitter <500fs ) , To avoid complicated debug work , we want to select a simple clk divider IC to relalize the above requirments , not pll , is there a recoomended IC slection ?
thanks very much ~