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TM4C1294KCPDT: GPT One-shot time only generates one pulse per processor reset

Part Number: TM4C1294KCPDT

Tool/software:

I want to use a GPT One-shot to generate a software triggered pulse. My code is:

   TimerDisable(TIMER4_BASE, TIMER_B);
   TimerConfigure
      (
      TIMER4_BASE,
      TIMER_CFG_SPLIT_PAIR | TIMER_CFG_B_ONE_SHOT | TIMER_CFG_B_ACT_SETCLRTO
      );
   TimerControlStall(TIMER4_BASE, TIMER_B, false);
   TimerPrescaleSet(TIMER4_BASE, TIMER_B, 120);
   TimerLoadSet(TIMER4_BASE, TIMER_B, 1000);
   TimerEnable(TIMER4_BASE, TIMER_B);

When I run the code a pulse is generated on PM5 as expected the first time the code is executed. Subsequent executions of the code however don't generate an output pulse. If I reload the code from CCS and run it again I again get a single pulse but no subsequent pulses.

The  SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER4); call is made once during system startup.

What am I missing?

  • When I run the code a pulse is generated on PM5 as expected the first time the code is executed. Subsequent executions of the code however don't generate an output pulse. If I reload the code from CCS and run it again I again get a single pulse but no subsequent pulses.

    Hi Peter,

      I don't see how you configure the pinmux for PM5 but I suppose you have configured in another part of your code not shown here. I'm unclear as to your application intention. Are you trying to generate a one-shot pulse? If this is your intention then the module is doing as expected as to generate an one-shot event and then disable the timer. Have you made sure that all status flags associated with this one-shot timers are cleared before you restart another one-shot event?

    When the timer is counting down and it reaches the timeout event (0x0), the timer reloads its start
    value from the GPTMTnILR and the GPTMTnPR registers on the next cycle. When the timer is
    counting up and it reaches the timeout event (the value in the GPTMTnILR and the optional
    GPTMTnPR registers), the timer reloads with 0x0. If configured to be a one-shot timer, the timer
    stops counting and clears the TnEN bit in the GPTMCTL register. If configured as a periodic timer,
    the timer starts counting again on the next cycle.

    ...

    The TCACT field of the GPTM Timer n Mode (GPTMTnMR) register can be configured to clear, set
    or toggle an output on a time-out event.

  • I have a fix. I've modified the code to clear TCACT when I first configure the timer, then set TCACT  to the desired value in a following line. I presume that in the previous code the timer doesn't notice that TCACT has been set again because it is the same value and so doesn't alter the state of CCP. The updated code is:

       HwReg(TIMER4_BASE | TIMER_O_TBMR) = 
          TIMER_TBMR_TBCINTD | TIMER_TBMR_TBILD | TIMER_TBMR_TBMR_1_SHOT;
       HwReg(TIMER4_BASE | TIMER_O_TBMR) |= TIMER_TBMR_TCACT_SETTOGTO;
       HwReg(TIMER4_BASE | TIMER_O_CTL) = TIMER_CTL_TBEN;
    

    Note that I've switched to directly accessing the timer registers rather than calling the TimerXXX functions, but that has no effect on the result.