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MSPM0G3519: CAN API Clarification

Part Number: MSPM0G3519
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

hi, Could you please help to understand the CAN API's; the following is form the mcan_multi_message_tx project

/* Write Tx Message to the Message RAM. */
        DL_MCAN_writeMsgRam(MCAN0_INST, DL_MCAN_MEM_TYPE_BUF, 0, &txMsg0);

        /* Write Tx Message to the Message RAM. */
        DL_MCAN_writeMsgRam(MCAN0_INST, DL_MCAN_MEM_TYPE_BUF, 1, &txMsg1);

        /* Add request for transmission. */
        DL_MCAN_TXBufAddReq(MCAN0_INST, 0);

        /* Add request for transmission. */
        DL_MCAN_TXBufAddReq(MCAN0_INST, 1);

My customer needs to use the FIFO; so they change the DL_MCAN_MEM_TYPE_BUF to DL_MCAN_MEM_TYPE_FIFO

          DL_MCAN_writeMsgRam(MCAN0_INST, DL_MCAN_MEM_TYPE_FIFO, 0, &txMsg0);

But when they change to DL_MCAN_MEM_TYPE_FIFO, the code does not work.

Please let us know how to use the API's for FIFO.

regards,

Frangline.

  • Hi Frangline, it looks like in your code above you are still referencing the TXBuf instead of the TXFifo. If you hold down CTRL and click on the  DL_MCAN_TXBufAddReq, it should take you to the referenced declaration  and definition which is in the dl_mcan.h file. You can look in there to see if there are any changes you need to make. I see several FIFO functions in there that could be causing the issue. Can you provide more details on the code, any other changes made, and the sysconfig settings?

    -Brian

  • Hi Brian,

    Thanks for the replay, we are trying to use Complete CAN buffer RAM In FIFO mode (First 512Bytes as Rx FIFO buffer and Next 512 Bytes as TX buffer sysconfig below image is attached)

      After configuring RAM as above with classic CAN and using the below code we are not able to transmit more than 1 messages at a time and same goes for receiving also 

           /* Write Tx Message to the Message RAM. */
            DL_MCAN_writeMsgRam(MCAN0_INST, DL_MCAN_MEM_TYPE_FIFO, 0, &txMsg0);

            /* Write Tx Message to the Message RAM. */
            DL_MCAN_writeMsgRam(MCAN0_INST, DL_MCAN_MEM_TYPE_FIFO, 0, &txMsg1);

            /* Add request for transmission. */
            DL_MCAN_TXBufAddReq(MCAN0_INST, 0);

            /* Add request for transmission. */
            DL_MCAN_TXBufAddReq(MCAN0_INST, 1)

    we are trying to understand which APIs to use for transmit when CAN RAM is configured as FIFO, Any response would be much appreciated. 

    Thanks you 

  • Hi Shivaraj,

    Looking at the examples in the SDK for CAN, it looks like you have different settings for the FIFO Event size, can you try changing this value to see if it allows more than the one message to be sent? Doesn't seem that you have a FIFO TX buffer as well.

    -Brian

  • Hi Brian,

    Yes we are not using FIFO Events so we have kept it 0.  we are using CAN RAM only for FIFO

    After going through available APIs, Now we are able to transmit 32 messages at a time using the below code for transmission but still we are facing issue for receiving CAN messages

        DL_MCAN_TxBufElement lstr_TxMsg;
        DL_MCAN_TxFIFOStatus  lstr_TxfifoStatus;
        /* Write Tx Message to the Message RAM (FIFO). */
        DL_MCAN_writeMsgRam(CAN_INST, DL_MCAN_MEM_TYPE_FIFO, 0, &lstr_TxMsg);
        /* Get put index and other TxFIFO details in txfifoStatus*/
        DL_MCAN_getTxFIFOQueStatus(CAN_INST, &lstr_TxfifoStatus);

        /* Add request for transmission. */
        DL_MCAN_TXBufAddReq(CAN_INST, lstr_TxfifoStatus.putIdx);

    For receiving CAN message we don't know which API to use when FIFO is filled with more than one message. 

  • Hi Shivaraj,

    You should be able to read those RX data via below code:

            if ((gInterruptLine1Status & MCAN_IR_RF0N_MASK) == MCAN_IR_RF0N_MASK) 
            {
                rxFS.num = DL_MCAN_RX_FIFO_NUM_0;
                while ((rxFS.fillLvl) == 0) 
                {
                    DL_MCAN_getRxFIFOStatus(MCAN0_INST, &rxFS);
                }
    
                DL_MCAN_readMsgRam(
                    MCAN0_INST, DL_MCAN_MEM_TYPE_FIFO, 0U, rxFS.num, &rxMsg);
    
                DL_MCAN_writeRxFIFOAck(MCAN0_INST, rxFS.num, rxFS.getIdx);
    
                processRxMsg(&rxMsg);
    
                gInterruptLine1Status &= ~(MCAN_IR_RF0N_MASK);
            }

    Thanks!

    Best Regards

    Johnson