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AM2432: epmty sample program system configuration

Part Number: AM2432
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

Hi team,

1. TCMA-R5F : what is R5F_VECS area with address 0x0~0x40 for? can this be used by the user side  as TCM?

2.does the TCMA start address need to be modified from the sample program?

3.RAM0_M4F : what is M4F_VECS area with address 0x0~0x200 for? can this be used by the user side  as RAM?

4. there is no M4F core in flash, is this different from Applmage?

Regards,

  • Hi,

    Thanks for your query.

    . TCMA-R5F : what is R5F_VECS area with address 0x0~0x40 for? can this be used by the user side  as TCM?

    The TCMA address from 0x0 - 0x40 are used to store the vector information. This is the entry of the application, _vector MUST be placed starting address 0x0.

    does the TCMA start address need to be modified from the sample program?

    Can you please tell what is the use case here? Also please tell us what do you mean by modifying TCMA start address?

    RAM0_M4F : what is M4F_VECS area with address 0x0~0x200 for? can this be used by the user side  as RAM?

    The M4F_VECS address from 0x0 - 0x200 are used to store vector information for M4F application. This region needs to be used to store the vector entry and can't be used to keep application code.

    there is no M4F core in flash, is this different from Applmage?

    I don't understand the above sentence. Can you please elaborate?

    Regards,

    Tushar

  • >>Can you please tell what is the use case here? Also please tell us what do you mean by modifying TCMA start address?

    the TCMA_R5F start address was different from Main Domain Memory Map written in P.41 of the Technical Reference Manual. on P208 Boot Memory Map there was only 0x4101_000~0x4101_7FFF and wanted to know if this needs to be changed.

     >>there is no M4F core in flash, is this different from Applmage?

    in the FLASH region core was not found and want to know if it different from the application image that will be written.

  • Hi Sho,

    the TCMA_R5F start address was different from Main Domain Memory Map written in P.41 of the Technical Reference Manual. on P208 Boot Memory Map there was only 0x4101_000~0x4101_7FFF and wanted to know if this needs to be changed.

    For R5F application the R5F TCMA memory local address start from 0x0 and for TCMB local address start from 0x41010. P41 of the TRM defines the address of TCM for an external source. Please refer section 6.2.3.2.2 Tightly-Coupled Memories (TCMs) of TRM for more info.

    in the FLASH region core was not found and want to know if it different from the application image that will be written.

    I don't understand this sentence, do you mean that Flash does not fall under R5 or M4, so which core will be able to write to flash?

    Please refer section 12.3.1 Flash Subsystem (FSS) of TRM for flash details.

    Regards,

    Tushar

  • Dear Tusher Thakur,

    >>I don't understand this sentence, do you mean that Flash does not fall under R5 or M4, so which core will be able to write to flash?

    I asked this question because I did not understand the purpose of the FLASH area specified in the Memory Region of Sysconfig.

    Is it correct that when memory is allocated in the Memory Region, each core can access the allocated regions using FSS(Flash Sub System)?

    Also, is it correct that there is no need to specify the address of the application image used for OSPI boot in the Memory Region?

     

    Best Regards,

    Yoshihide Nagata

  • Hi Yoshihide,

    Are you referring to the FLASH region configured in example.syscfg file? Please refer below image.

    We are not using this section anywhere to keep any data or text. Hope this clarifies.

    Regards,

    Tushar

  • Hi Tusher,



    Thank you for your reply.

    >>Are you referring to the FLASH region configured in example.syscfg file?

    Yes, that’s correct.

    >>We are not using this section anywhere to keep any data or text.

    I understand that it is not being used within the SDK


    Additionally, could you please tell me if there are any regions that cannot be used when the user side utilizes FLASH?

    Best Regards,

    Yoshihide Nagata

  • Hi Yoshihide,

    The FLASH memory above is reserved for the OSPI in DAC mode. This memory can only be accessed for reading not writing.

    Regards,

    Tushar 

  • Hi Tusher,

     Sorry. I don't understand, so please teach me.
    - Is my understanding correct that "The FLASH memory above" refers to external FLASH memory?
    - If I use a mode other than DAC mode, can I write to the FLASH memory mentioned above?

    The background of my question is to find out whether there is a way to write to the FLASH.

    Best Regards,

    Yoshihide Nagata

  • Hi Yoshihide,

    If the use case is just to write the binary to flash memory, you can use the flashing tool provided in the SDK. 

    Please refer FLASH_APPLICATION, for steps to flash an application. 

    Regards,

    Tushar

  • Hi Tusher,

    >>If the use case is just to write the binary to flash memory, you can use the flashing tool provided in the SDK. 

    As a use case, I am considering writing the expanded data from MSRAM to FLASH, rather than writing from the PC.

    I believe there is sample code available for this.


    AM243x MCU+ SDK: OSPI Flash IO
    AM243x MCU+ SDK: OSPI Flash DMA

    When I tested the sample code, I was able to write to FLASH via OSPI.

    However, the statement 'This memory can only be accessed for reading not writing' does not match the sample code,

    so I would like to know the reason for this.

    Best Regards,

    Yoshihide Nagata

  • Hi,

    Allow me sometime to read through this thread, as I am assigned to this ticket about few hours ago.

    I will post a response once I have read through this.

    Regards,

    Vaibhav

  • Hey Vaibhav,

    Happy new year!

    Please provide a response to Nagata san's query.

    However, the statement 'This memory can only be accessed for reading not writing' does not match the sample code,

    so I would like to know the reason for this.

    Best Regards

    Charan

  • Hi,

    Thanks for your patience.

    I have read through the thread and I will provide my insights.

    >>If the use case is just to write the binary to flash memory, you can use the flashing tool provided in the SDK. 

    As a use case, I am considering writing the expanded data from MSRAM to FLASH, rather than writing from the PC.

    I believe there is sample code available for this.


    AM243x MCU+ SDK: OSPI Flash IO
    AM243x MCU+ SDK: OSPI Flash DMA

    When I tested the sample code, I was able to write to FLASH via OSPI.

    However, the statement 'This memory can only be accessed for reading not writing' does not match the sample code,

    so I would like to know the reason for this.

    I would like to comment on the response you wrote here.

    NOTE:

    Before reading the below response, please understand the phrase "DAC enabled". So wherever I say "DAC enabled", it means Direct Access Enabled. This in a naive way means that when DAC is enabled, the flash memory is mapped to our SoC memory starting at address 0x60000000. When DAC is enabled, its pretty obvious that you can see the flash memory contents from SoC memory starting at 0x60000000.

    So, the flash part you are using has its own memory.

    Now, our drivers are designed in a way that it is capable of writing to the flash memory and reading from the same by calling the top level APIs namely Flash_write() and Flash_read(). But there is more.

    The classification happens based on the flash part you are using, NAND or NOR Flash part.

    1. For NAND Flash part, the writing process is direct write operation. This means DAC is enabled and the write operation takes place.
    2. For NOR Flash part, the writing process is indirect write operation. This means DAC is disabled and the writing process takes place.

    The reason for NOR have indirect writing and NAND having direct writing is clearly documented here: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1448730/am6421-does-ospi-support-dma/5561444#5561444

    As far as reading from the flash part is concerned, the reading always happens in a direct mode. So direct/DAC reads for both NOR and NAND flash parts.

    You get an advantage on top of DAC reads if you enable DMA, so that would mean the fastest way to read would be (DMA enabled + DAC reads).

    Let me know if this clarifies few of your doubts, and please go ahead and ask more doubts for further clarifications.

    Regards,

    Vaibhav

  • Hi Tusher,

    I apologize for the delayed response.

    Thank you for the information regarding the DAC.

    Could you please clarify the following three points for me?
    a) I understand that on the AM243x-lp, due to the presence of NOR flash, it cannot be written to when the DAC is enabled.
     -> Is my understanding correct that "This memory can only be accessed for reading not writing." is accurate?
    b) How can I determine whether the DAC is enabled or disabled?
    c) I understand that if the DAC is disabled, writing to the NOR flash is possible.
    -> What steps should I take to disable the DAC and write to the NOR flash?
    Would the AM243x MCU+ SDK: OSPI Flash IO be the appropriate solution for this?

    Best Regards,
    Yoshihide Nagata

  • Hi,

    Allow me sometime to comment on your additional questions.

    Regards,

    Vaibhav

  • Hi,

    Is my understanding correct that "This memory can only be accessed for reading not writing."

    The memory can be directly accessed for reading only and for writing to the flash it would be an indirect write operation, where we make use of the internal SRAM.

    b) How can I determine whether the DAC is enabled or disabled?

    There is an API named OSPI_enableDacMode() and OSPI_disableDacMode() which enables and disables DAC mode respectively.

    Alternate way to find out is if you see contents of the flash part from the address 0x60000000, then DAC is enabled.

    But in the read API, its taken care, so you would need to just call the read API. The flow would be as follows:

    Flash_read() calls

    OSPI_readDirect()

    Dac is enabled here

    read happens

    Dac is disabled

    Get out of the OSPI_readDirect()

    Function call returns back to Flash_read()

    So you see you do not need to explicitly define when to call the DAC enable, just need to make sure to call the Flash_read().

    Hope this answers your doubt.

    c) I understand that if the DAC is disabled, writing to the NOR flash is possible.
    -> What steps should I take to disable the DAC and write to the NOR flash?
    Would the AM243x MCU+ SDK: OSPI Flash IO be the appropriate solution for this?

    You should not worry about the DAC being enabled for writes as it is disabled when the indirect write operation happens.

    So lets say you want to write some bytes to a certain flash memory, then you should:

    1. Erase the flash memory to be written to

    2. Now write to the flash memory

    At point 2, when you are writing, you would need to call Flash_write(), and the implementation of it is as follows:

    Flash_write() calls

    OSPI_writeIndirect()

    Dac mode is disabled

    Write happens

    Exits out of OSPI_writeIndirect()

    Function call returns back to Flash_write()

    Regards,

    Vaibhav

  • Hi Vaibhav,

    I'm sorry for the delayed response.

    I understand that I can write to FLASH using Flash_write().

    All my questions regarding this matter have been resolved.

    Thank you for your support.

    Best Regards,
    Yoshihide Nagata

  • Hi,

    I understand that I can write to FLASH using Flash_write().

    All my questions regarding this matter have been resolved.

    Please mark my previous response resolved, if the explanation helped.

    Closing this thread.

    Regards,
    Vaibhav