Part Number: MSPM0G3507
Tool/software:
TI sample code for the GPIO hardware includes a short delay between setting the ENABLE bit of the PWREN register and modifying other registers within the GPIO module. I could not find a specification for this in the MSPM0G350x data sheet.
What should this delay be in nanoseconds (or microseconds)?
Is this value the same for other hardware modules (e.g. ADC12, COMP, etc.) or is a different delay needed for those modules?
If the delay needed for other modules is different, where can this specification be found?
Thank you for the help.
-Craig Goldman
