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TMS570LC4357-EP: ESM Group 2 and 3 channels on the MCU

Part Number: TMS570LC4357-EP
Other Parts Discussed in Thread: HALCOGEN

Tool/software:

Hello,

We are using the TMS570LC43x LaunchPad for evaluation at this point of our project. After selecting the TMS570LC4357ZWT as the MCU with the HalCoGen tool, we observed:

Our question:

  • Does the above indicate that on the TMS570LC43 MCU of the TMS570LC43x eval board, only Group 1 of error channels are available from its ESM? If so, then it does not seem to consistent with what we read here:

Please advise. Thank you.

John

  • Hi John,

    Does the above indicate that on the TMS570LC43 MCU of the TMS570LC43x eval board, only Group 1 of error channels are available from its ESM?

    No, Group 2 and Group 3 Error channels also available.

    However as mentioned in TRM, configurable interrupt generation and configurable ERROR pin behavior is only available for Group 1.

    That means, as these errors are low severity, we can configure whether these errors need to generate interrupt or need to trigger ERROR pin.  However, Group 2 and Group 3 errors are high severity, so these configurations are not available for them. That means Group 2 and Group 3 errors will always trigger ERROR pin whenever they occurred and in addition group 2 error will trigger high priority interrupt and group 3 errors will trigger aborts.

    Refer this block diagram once:

    That is the reason only Group 1 is given in the HALCoGen which can have configurable interrupts and configurable ERROR pin behavior.

    Example:

    By enabling below line we can enable the interrupt for channel 2 in Group 1:

    Similarly, by enabling below line we could enable ERROR pin behavior to the channel 2 in Group 1, that means if this error occurred after enabling this then the corresponding error will trigger the ERROR pin low.

    --
    Thanks & regards,
    Jagadish.

  • Hi Jagadish,

    Thank you for the information as always, and now there is more clarification.

    If I may ask further:

    • Since the ESM Group 2 errors will generate non-maskable interrupts, then does that mean the below function in HL_notification.c (generated by HalCoGen) will simply be executed when a Group 2 interrupt occurs, without the user code enabling any part of ESM?
    void esmGroup2Notification(esmBASE_t *esm, uint32 channel)
    {
    /*  enter user code between the USER CODE BEGIN and USER CODE END. */
    /* USER CODE BEGIN (3) */
    /* USER CODE END */
    }
    We have actually used the CCMKEYR1 register (MKEY1 field set to 0x9) to force the "CCM-R5F - CPU compare error", which is an ESM Group 2 Ch. 2 error. We then observed the nERROR pin pulled low, but the esmGroup2Notification function never gets executed.
    • Also, I see the function 'esmGroup3Notification' in HL_notification.c as well. If the ESM Group 3 errors do not generate any interrupts, then why is such a function generated by HalCoGen?
    • Could you please elaborate on how the ESM Group 3 errors will "trigger aborts", and the effect of such aborts on software running on the MCU?
    • Lastly, could you please also suggest an easy way to force an error that can be detected by ESM, and hence a flag can be asserted in any of the ESM Status Registers?

    Please advise. Thanks!

    John

  • Hi John,

    Apologies for the delayed response, i was stuck with other issues.

    Since the ESM Group 2 errors will generate non-maskable interrupts, then does that mean the below function in HL_notification.c (generated by HalCoGen) will simply be executed when a Group 2 interrupt occurs, without the user code enabling any part of ESM?

    Yes, you no need to enable the any interrupt on ESM side unlike for Group 1. For Group 2 errors you will directly get the ESM notifications.

    The only thing you need to enable is that FIQ interrupt in VIM module, we need to do this in our code.

    As you can see ESM is FIQ interrupt, so we need to call below API to enable the FIQ interrupts.

    This is needed for all the ESM interrupts irrespective of Group1 or Group2.

    Also, I see the function 'esmGroup3Notification' in HL_notification.c as well. If the ESM Group 3 errors do not generate any interrupts, then why is such a function generated by HalCoGen?

    Yes, you are right, the Group 2 errors will not generate any interrupts.

    You can see below API as well, there is no Group 3 notification calling here:

    There is only Group 1 and Group 2 callings for ESM interrupts.

    This Group 3 notifications is only calling at startup code.

    After any reset here we are just verifying was there any group 3 errors. I mean if there is a group 3 errors then we are calling out this notification function. So, as we discussed there is no ESM interrupts for Group 3.

    --
    Thanks & regards,
    Jagadish.

  • Thank you, Jagadish. Could you also please respond to the last 3 questions listed above? They are repeated here:

    • As you pointed out, the function "_enable_interrupt_()" needs to be called during initialization, before "esmGroup2Notification()" can be executed when an ESM Group 2 error has occurred. Could you let us know the difference between "_enable_interrupt_()" and "_enable_IRQ_interrupt_()", please?
      • One function is to enable "FIQ" and the other one is to enable "IRQ"? What are the major differences between the two kinds of interrupts?
    • Could you please elaborate on how the ESM Group 3 errors will "trigger aborts", and the effect of such aborts on software running on the MCU?
    • Lastly, could you please also suggest an easiest way (if different from what we described above) to force an error that can be detected by ESM?

    Thank you!

     

    John

  • Hi John Lu,

    As you pointed out, the function "_enable_interrupt_()" needs to be called during initialization, before "esmGroup2Notification()" can be executed when an ESM Group 2 error has occurred. Could you let us know the difference between "_enable_interrupt_()" and "_enable_IRQ_interrupt_()", please?
    • One function is to enable "FIQ" and the other one is to enable "IRQ"? What are the major differences between the two kinds of interrupts?

    The API _enable_IRQ_interrupt_ will enable only IRQ.

    Whereas the API _enable_interrupt_ will enable both IRQ and FIQ.

    As ESM interrupt is an FIQ interrupt, we should call the _enable_interrupt_ API to enable FIQ interrupt.

    You can also refer below thread once:

    (+) RM57L843: How to use Digital Watchdog on RM57Lx - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

    Here customer want to use watchdog NMI interrupt, and which is also an ESM Group 2 interrupt, so here we observed the issue in practical and we got the interrupt only after enabling FIQ interrupt using _enable_interrupt_ API.

    --
    Thanks & regards,
    Jagadish.

  • Hi Jagadish,

    Sorry about the late reply, as we were on holidays previously. Thank you for the reply and patience.

    Also, could you address these two questions, please?

    • Could you please elaborate on how the ESM Group 3 errors will "trigger aborts" (as you mentioned previously), and the effect of such aborts on software running on the MCU?
    • Lastly, could you please also suggest an easiest way (if different from what we described above) to force an error that can be detected by ESM?

    Thank you!

    John

  • Hi John,

    As per my knowledge, there won't be any document that describes the which ESM Group3 will trigger which abort.

    The handling of these ESM errors and aborts also just depends on the application requirements. Some customers will just log these errors some customers will perform the resets.

    There is no specific procedure for them.

    --
    Thanks & regards,
    Jagadish.

  • Hi Jagadish,

    I think, the ESM will just assert the ERROR output signal from the MCU when there is a Group 3 error, as the reference manual stated. So, it will depend on how the ERROR output signal is connected on the custom board.

    Thanks.

    John