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MSPM0L1306: Use ADC to clear or set GPIO without ISR

Part Number: MSPM0L1306
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

Hi champs,

I am asking this for our customer.

For over current protection (OCP), we are aware that it's good to use the on-chip comparator to set/clear GPIO without ISR for fast response time.

But because of limited number of comparators, the user wonders is it possible to use ADC with on-chip oversampling, say 4x, and when the result is over a threshold, set/clear GPIO without any ISR?

That is, there are on-chip hardware to handle ADC 4x oversampling (accumulation for 4x times and right shift by 2), compare the oversampled result with a threshold, and then set/clear a GPIO without any runtime ISR or CPU intervention?

  • Hey Wayne,

    I didn't actually run an example, but the ADC does seem to have a window comparator mode. The ADC result is compared against the window high and low values at the end of a conversion, and can trigger an ISR or Event.  You can read about it in section 14.2.12.1 of the TRM.  

    Here I see the configurations for it SysConfig for the ADC configuration:

    And you can trigger an Event off of the Window comparator interrupts:

    Overall, the full flow without CPU intervention would be something like this:  Timer running and it would trigger the ADC to perform conversations over and over.  At the end of each conversion, the ADC will compare and can publish an Event, and if the ADC crosses a programmed threshold, it could trigger the GPIO directly by configuring it as the subscriber to the event. 

    Hope this makes sense.

    Thanks,

    JD