Other Parts Discussed in Thread: SYSCONFIG
Tool/software:
Hello, I am moving from another uC to this family @ our company for new products (currently NXP)... Right now, I am trying to look around and get all the information about this family which fits our needs probably... While that I found something unclear to me and I would like to clarify. It is probably a very stupid question, but I didn't find reply :) I never worked with ARM before, only with FPGA and many different cores (eg. 68K). Some clear things for ARM is not yet stored @ my head unfortunately
In the datasheet is written (Table 6-3. Signal Descriptions): I2C0_SCL pins for 64PM package: 34 39 57 (also noted in few other places).
I found a reference to IOMUX (technical ref manual) and I checked it. As I understand, I can 'freely' map any IO pin to "any" physical pin. But table 6-3 gives some restrictions (3 pins only).
When I opened sysconfig and I tried to play with exactly same device, I could see at the same signal following options: (34) 44 (57) 8 10 36 (39) 50 (-> 5 additionals).
Generally speaking - where to found these HW/pacakge restrictions - in the PDF ? In the Sysconfig ? Or it is really full matrix ?
When I would like to change these things on fly (which is required) do I have some other limitations or just select proper BSLPINCFG1/I2CSCL_MUX_SEL ?
Additionally - where exactly to find PINCM regs/values ? In the table "Table 6-1. Pin Attributes" is column named PINCMx. If this is the right value, I would expect refference to pin 44 like in sysconfig. But there is I2C_SCL @ 34 (included in 6-3) and I2C1_SCL[9] @ 44 (not included in 6-3 but in sysconfig) and for pin 10 is I2C missing completely. Which confuses me even more :)
Thank you for showing me the right way to go.
R.



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