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MCU-PLUS-SDK-AM263PX: CCS System Project creation for multicore

Part Number: MCU-PLUS-SDK-AM263PX
Other Parts Discussed in Thread: SYSCONFIG, AM263P4

Tool/software:

I have been attempting to create a multicore system project for the AM26Px. For our specific project, cores R5FSS0_0 and R5FSS0_1 will run in lockstep, cores R5FSS1_0 and R5FSS1_1 will run in Standalone, and both PRU_0 and PRU_1 will be used. I have tried following several different sources for instructions or examples on how to correctly setup a system project to do this, but continue encountering issues with the syscfg as well as compiling the projects. Are there examples in the SDK that would show how to correctly configure the System project as well as each core's project and syscfg? 

  • For additional information, I have attempted to utilize the tmu_cores_support project as a starting place. I imported that project and attempted to rename the system project and all subprojects, but that doesn't seem to fully rename everything and gives me the error " If an argument is embedded in a script and explicitly specified via the CLI
    then precedence is given to the CLI arguments. Additionally, specifying
    "--board" or "--device" on the CLI will override any "--board" and "--device"
    arguments specified in the script."

    I have also tried creating each project from a new CCS project as documented at https://software-dl.ti.com/ccs/esd/documents/application_notes/appnote-system_project_debug_launch.html . New projects don't get created with a sysConfig, which then is time consuming to create for all projects and still doesn't not compile.

    I have also tried using both the Empty and Hello_World example projects as a way to leverage a built project with a sysConfig. Copying the files and changing the sysConfig file in each project to reflect which core to use gives similar warnings to what I've mentioned above.

    I continue to try different approaches to get this to work, but I have not been able to locate any guides on how to correctly port existing projects (such as the empty or hello world projects) into a multicore system project. 

  • Hi Nathan,
    Thanks for your patience. Can you please confirm if these are the steps you did

    1. go to tmu_cores_support project
    2. search and replace the system_nortos and other r5fssx-y folder names to a custom name
    3. import project to ccs and build

    Also, it will be helpful if you could paste the build log including the whole error message here.

    Regards,
    Aswathi

  • I attempted these steps, but step 2 is understated. changing the "folder names" alone does not allow the project to be imported. Then searching down and replacing all instances of "system-nortos" and "r5fssx-y" throughout the raw files is convoluted. I do not believe that this approach of renaming a project (which doesn't fit my requirements) will be successful, and I will not be continuing to try this development path.

    I reiterate what was stated in my original post. I need instructions on create a multicore system project for the AM26Px. For our specific project, cores R5FSS0_0 and R5FSS0_1 will run in lockstep, cores R5FSS1_0 and R5FSS1_1 will run in Standalone, and both PRU_0 and PRU_1 will be used. 

    Creating new CCS projects for the AM263Px from within CCS does not create projects that will build. Therefore the instructions found at https://software-dl.ti.com/ccs/esd/documents/application_notes/appnote-system_project_debug_launch.html cannot be used. Although the TI parts seem as though they are feature rich for multicore support, there is a notable lack of documentation on how to implement a multicore project.

  • With the current project I am attempting, I am consistently getting the message "Every --script must be followed by a unique --context" whenever I attempt to open any of the associated syscfg files. A similar message appears when I try to compile the system project. I have examined the files in depth and I am unable to determine the cause of this. Here are the contents of the syscfg files:

    system.xml

    <?xml version="1.0" encoding="UTF-8" standalone="no"?>
    <system>
        <project configuration="@match" id="project_237174402" name="50019F-COD002_R5FSS0"/>
        <core id="Cortex_R5_0" project="project_237174402"/>
        <project configuration="@match" id="project_889647109" name="50019F-COD003_R5FSS1_0"/>
        <core id="Cortex_R5_2" project="project_889647109"/>
        <project configuration="@match" id="project_1165723466" name="50019F-COD004_R5FSS1_1"/>
        <core id="Cortex_R5_3" project="project_1165723466"/>
    </system>
     
    R5FSS0.syscfg

    /**
    * These arguments were used when this file was generated. They will be automatically applied on subsequent loads
    * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
    * @cliArgs --device "AM263Px" --part "AM263P4" --package "ZCZ_F" --context "r5fss0-0" --product "MCU_PLUS_SDK_AM263Px@10.00.00"
    * @v2CliArgs --device "AM263P4" --package "NFBGA (ZCZ-F)" --context "r5fss0-0" --product "MCU_PLUS_SDK_AM263Px@10.00.00"
    * @versions {"tool":"1.22.0+3893"}
    */

    /**
    * Import the modules used in this configuration.
    */
    const default_linker = scripting.addModule("/memory_configurator/default_linker", {}, false);
    const default_linker1 = default_linker.addInstance();
    const general = scripting.addModule("/memory_configurator/general", {}, false);
    const general1 = general.addInstance();
    const region = scripting.addModule("/memory_configurator/region", {}, false);
    const region1 = region.addInstance();
    const section = scripting.addModule("/memory_configurator/section", {}, false);
    const section1 = section.addInstance();
    const section2 = section.addInstance();
    const section3 = section.addInstance();
    const section4 = section.addInstance();
    const section5 = section.addInstance();
    const section6 = section.addInstance();
    const section7 = section.addInstance();
    const section8 = section.addInstance();
    const section9 = section.addInstance();
    const section10 = section.addInstance();
    const section11 = section.addInstance();
    const section12 = section.addInstance();

    /**
    * Write custom configuration values to the imported modules.
    */
    default_linker1.$name = "memory_configurator_default_linker0";

    general1.$name = "CONFIG_GENERAL0";
    general1.linker.$name = "TIARMCLANG0";

    region1.$name = "MEMORY_REGION_CONFIGURATION0";
    region1.memory_region.create(11);
    region1.memory_region[0].type = "TCMA";
    region1.memory_region[0].$name = "R5F_VECS";
    region1.memory_region[0].size = 0x40;
    region1.memory_region[0].auto = false;
    region1.memory_region[1].type = "TCMA";
    region1.memory_region[1].$name = "R5F_TCMA";
    region1.memory_region[1].size = 0x7FC0;
    region1.memory_region[2].type = "TCMB";
    region1.memory_region[2].size = 0x8000;
    region1.memory_region[2].$name = "R5F_TCMB";
    region1.memory_region[3].$name = "SBL";
    region1.memory_region[3].auto = false;
    region1.memory_region[3].size = 0x40000;
    region1.memory_region[4].$name = "OCRAM";
    region1.memory_region[4].auto = false;
    region1.memory_region[4].manualStartAddress = 0x70040000;
    region1.memory_region[4].size = 0x40000;
    region1.memory_region[5].type = "FLASH";
    region1.memory_region[5].auto = false;
    region1.memory_region[5].manualStartAddress = 0x60100000;
    region1.memory_region[5].size = 0x80000;
    region1.memory_region[5].$name = "FLASH";
    region1.memory_region[6].$name = "USER_SHM_MEM";
    region1.memory_region[6].auto = false;
    region1.memory_region[6].manualStartAddress = 0x701D0000;
    region1.memory_region[6].size = 0x4000;
    region1.memory_region[6].isShared = true;
    region1.memory_region[6].shared_cores = ["r5fss1-0","r5fss1-1"];
    region1.memory_region[7].$name = "LOG_SHM_MEM";
    region1.memory_region[7].auto = false;
    region1.memory_region[7].manualStartAddress = 0x701D4000;
    region1.memory_region[7].size = 0x4000;
    region1.memory_region[7].isShared = true;
    region1.memory_region[7].shared_cores = ["r5fss1-0","r5fss1-1"];
    region1.memory_region[8].type = "CUSTOM";
    region1.memory_region[8].$name = "RTOS_NORTOS_IPC_SHM_MEM";
    region1.memory_region[8].auto = false;
    region1.memory_region[8].manualStartAddress = 0x72000000;
    region1.memory_region[8].size = 0x3E80;
    region1.memory_region[8].isShared = true;
    region1.memory_region[8].shared_cores = ["r5fss1-0","r5fss1-1"];
    region1.memory_region[9].type = "CUSTOM";
    region1.memory_region[9].$name = "MAILBOX_HSM";
    region1.memory_region[9].auto = false;
    region1.memory_region[9].manualStartAddress = 0x44000000;
    region1.memory_region[9].size = 0x3CE;
    region1.memory_region[9].isShared = true;
    region1.memory_region[9].shared_cores = ["r5fss1-0","r5fss1-1"];
    region1.memory_region[10].type = "CUSTOM";
    region1.memory_region[10].$name = "MAILBOX_R5F";
    region1.memory_region[10].auto = false;
    region1.memory_region[10].manualStartAddress = 0x44000400;
    region1.memory_region[10].size = 0x3CE;
    region1.memory_region[10].isShared = true;
    region1.memory_region[10].shared_cores = ["r5fss1-0","r5fss1-1"];

    section1.load_memory = "R5F_VECS";
    section1.group = false;
    section1.$name = "Vector Table";
    section1.output_section.create(1);
    section1.output_section[0].$name = ".vectors";
    section1.output_section[0].palignment = true;

    section2.load_memory = "OCRAM";
    section2.$name = "Text Segments";
    section2.output_section.create(5);
    section2.output_section[0].$name = ".text.hwi";
    section2.output_section[0].palignment = true;
    section2.output_section[1].$name = ".text.cache";
    section2.output_section[1].palignment = true;
    section2.output_section[2].$name = ".text.mpu";
    section2.output_section[2].palignment = true;
    section2.output_section[3].$name = ".text.boot";
    section2.output_section[3].palignment = true;
    section2.output_section[4].$name = ".text:abort";
    section2.output_section[4].palignment = true;

    section3.load_memory = "OCRAM";
    section3.$name = "Code and Read-Only Data";
    section3.output_section.create(2);
    section3.output_section[0].$name = ".text";
    section3.output_section[0].palignment = true;
    section3.output_section[1].$name = ".rodata";
    section3.output_section[1].palignment = true;

    section4.load_memory = "OCRAM";
    section4.$name = "Data Segment";
    section4.output_section.create(1);
    section4.output_section[0].$name = ".data";
    section4.output_section[0].palignment = true;

    section5.load_memory = "OCRAM";
    section5.$name = "Memory Segments";
    section5.output_section.create(3);
    section5.output_section[0].$name = ".bss";
    section5.output_section[0].output_sections_start = "__BSS_START";
    section5.output_section[0].output_sections_end = "__BSS_END";
    section5.output_section[0].palignment = true;
    section5.output_section[1].$name = ".sysmem";
    section5.output_section[1].palignment = true;
    section5.output_section[2].$name = ".stack";
    section5.output_section[2].palignment = true;

    section6.load_memory = "OCRAM";
    section6.$name = "Stack Segments";
    section6.output_section.create(5);
    section6.output_section[0].$name = ".irqstack";
    section6.output_section[0].output_sections_start = "__IRQ_STACK_START";
    section6.output_section[0].output_sections_end = "__IRQ_STACK_END";
    section6.output_section[0].input_section.create(1);
    section6.output_section[0].input_section[0].$name = ". = . + __IRQ_STACK_SIZE;";
    section6.output_section[1].$name = ".fiqstack";
    section6.output_section[1].output_sections_start = "__FIQ_STACK_START";
    section6.output_section[1].output_sections_end = "__FIQ_STACK_END";
    section6.output_section[1].input_section.create(1);
    section6.output_section[1].input_section[0].$name = ". = . + __FIQ_STACK_SIZE;";
    section6.output_section[2].$name = ".svcstack";
    section6.output_section[2].output_sections_start = "__SVC_STACK_START";
    section6.output_section[2].output_sections_end = "__SVC_STACK_END";
    section6.output_section[2].input_section.create(1);
    section6.output_section[2].input_section[0].$name = ". = . + __SVC_STACK_SIZE;";
    section6.output_section[3].$name = ".abortstack";
    section6.output_section[3].output_sections_start = "__ABORT_STACK_START";
    section6.output_section[3].output_sections_end = "__ABORT_STACK_END";
    section6.output_section[3].input_section.create(1);
    section6.output_section[3].input_section[0].$name = ". = . + __ABORT_STACK_SIZE;";
    section6.output_section[4].$name = ".undefinedstack";
    section6.output_section[4].output_sections_start = "__UNDEFINED_STACK_START";
    section6.output_section[4].output_sections_end = "__UNDEFINED_STACK_END";
    section6.output_section[4].input_section.create(1);
    section6.output_section[4].input_section[0].$name = ". = . + __UNDEFINED_STACK_SIZE;";

    section7.load_memory = "OCRAM";
    section7.$name = "Initialization and Exception Handling";
    section7.output_section.create(3);
    section7.output_section[0].$name = ".ARM.exidx";
    section7.output_section[0].palignment = true;
    section7.output_section[1].$name = ".init_array";
    section7.output_section[1].palignment = true;
    section7.output_section[2].$name = ".fini_array";
    section7.output_section[2].palignment = true;

    section8.load_memory = "USER_SHM_MEM";
    section8.type = "NOLOAD";
    section8.$name = "User Shared Memory";
    section8.group = false;
    section8.output_section.create(1);
    section8.output_section[0].$name = ".bss.user_shared_mem";
    section8.output_section[0].alignment = 0;

    section9.load_memory = "LOG_SHM_MEM";
    section9.$name = "Log Shared Memory";
    section9.group = false;
    section9.type = "NOLOAD";
    section9.output_section.create(1);
    section9.output_section[0].$name = ".bss.log_shared_mem";
    section9.output_section[0].alignment = 0;

    section10.load_memory = "RTOS_NORTOS_IPC_SHM_MEM";
    section10.type = "NOLOAD";
    section10.$name = "IPC Shared Memory";
    section10.group = false;
    section10.output_section.create(1);
    section10.output_section[0].$name = ".bss.ipc_vring_mem";
    section10.output_section[0].alignment = 0;

    section11.load_memory = "MAILBOX_HSM";
    section11.type = "NOLOAD";
    section11.$name = "SIPC HSM Queue Memory";
    section11.group = false;
    section11.output_section.create(1);
    section11.output_section[0].$name = ".bss.sipc_hsm_queue_mem";
    section11.output_section[0].alignment = 0;

    section12.load_memory = "MAILBOX_R5F";
    section12.$name = "SIPC R5F Queue Memory";
    section12.group = false;
    section12.type = "NOLOAD";
    section12.output_section.create(1);
    section12.output_section[0].$name = ".bss.sipc_secure_host_queue_mem";
    section12.output_section[0].alignment = 0;

    R5FSS1_0.syscfg

    /**
    * These arguments were used when this file was generated. They will be automatically applied on subsequent loads
    * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
    * @cliArgs --device "AM263Px" --part "AM263P4" --package "ZCZ_F" --context "r5fss1-0" --product "MCU_PLUS_SDK_AM263Px@10.00.00"
    * @v2CliArgs --device "AM263P4" --package "NFBGA (ZCZ-F)" --context "r5fss1-0" --product "MCU_PLUS_SDK_AM263Px@10.00.00"
    * @versions {"tool":"1.22.0+3893"}
    */

    /**
    * Import the modules used in this configuration.
    */
    const default_linker = scripting.addModule("/memory_configurator/default_linker", {}, false);
    const default_linker1 = default_linker.addInstance();
    const general = scripting.addModule("/memory_configurator/general", {}, false);
    const general1 = general.addInstance();
    const region = scripting.addModule("/memory_configurator/region", {}, false);
    const region1 = region.addInstance();
    const section = scripting.addModule("/memory_configurator/section", {}, false);
    const section1 = section.addInstance();
    const section2 = section.addInstance();
    const section3 = section.addInstance();
    const section4 = section.addInstance();
    const section5 = section.addInstance();
    const section6 = section.addInstance();
    const section7 = section.addInstance();
    const section8 = section.addInstance();
    const section9 = section.addInstance();
    const section10 = section.addInstance();
    const section11 = section.addInstance();
    const section12 = section.addInstance();

    /**
    * Write custom configuration values to the imported modules.
    */
    default_linker1.$name = "memory_configurator_default_linker0";

    general1.$name = "CONFIG_GENERAL0";
    general1.linker.$name = "TIARMCLANG0";

    region1.$name = "MEMORY_REGION_CONFIGURATION0";
    region1.memory_region.create(5);
    region1.memory_region[0].type = "TCMA";
    region1.memory_region[0].$name = "R5F_VECS";
    region1.memory_region[0].auto = false;
    region1.memory_region[0].size = 0x40;
    region1.memory_region[1].type = "TCMA";
    region1.memory_region[1].$name = "R5F_TCMA";
    region1.memory_region[1].size = 0x7FC0;
    region1.memory_region[2].type = "TCMB";
    region1.memory_region[2].size = 0x8000;
    region1.memory_region[2].$name = "R5F_TCMB";
    region1.memory_region[3].$name = "OCRAM";
    region1.memory_region[3].auto = false;
    region1.memory_region[3].manualStartAddress = 0x700C0000;
    region1.memory_region[3].size = 0x40000;
    region1.memory_region[4].type = "FLASH";
    region1.memory_region[4].auto = false;
    region1.memory_region[4].manualStartAddress = 0x60200000;
    region1.memory_region[4].size = 0x80000;
    region1.memory_region[4].$name = "FLASH";

    section1.load_memory = "R5F_VECS";
    section1.group = false;
    section1.$name = "Vector Table";
    section1.output_section.create(1);
    section1.output_section[0].$name = ".vectors";
    section1.output_section[0].palignment = true;

    section2.load_memory = "OCRAM";
    section2.$name = "Text Segments";
    section2.output_section.create(5);
    section2.output_section[0].$name = ".text.hwi";
    section2.output_section[0].palignment = true;
    section2.output_section[1].$name = ".text.cache";
    section2.output_section[1].palignment = true;
    section2.output_section[2].$name = ".text.mpu";
    section2.output_section[2].palignment = true;
    section2.output_section[3].$name = ".text.boot";
    section2.output_section[3].palignment = true;
    section2.output_section[4].$name = ".text:abort";
    section2.output_section[4].palignment = true;

    section3.load_memory = "OCRAM";
    section3.$name = "Code and Read-Only Data";
    section3.output_section.create(2);
    section3.output_section[0].$name = ".text";
    section3.output_section[0].palignment = true;
    section3.output_section[1].$name = ".rodata";
    section3.output_section[1].palignment = true;

    section4.load_memory = "OCRAM";
    section4.$name = "Data Segment";
    section4.output_section.create(1);
    section4.output_section[0].$name = ".data";
    section4.output_section[0].palignment = true;

    section5.load_memory = "OCRAM";
    section5.$name = "Memory Segments";
    section5.output_section.create(3);
    section5.output_section[0].$name = ".bss";
    section5.output_section[0].output_sections_start = "__BSS_START";
    section5.output_section[0].output_sections_end = "__BSS_END";
    section5.output_section[0].palignment = true;
    section5.output_section[1].$name = ".sysmem";
    section5.output_section[1].palignment = true;
    section5.output_section[2].$name = ".stack";
    section5.output_section[2].palignment = true;

    section6.load_memory = "OCRAM";
    section6.$name = "Stack Segments";
    section6.output_section.create(5);
    section6.output_section[0].$name = ".irqstack";
    section6.output_section[0].output_sections_start = "__IRQ_STACK_START";
    section6.output_section[0].output_sections_end = "__IRQ_STACK_END";
    section6.output_section[0].input_section.create(1);
    section6.output_section[0].input_section[0].$name = ". = . + __IRQ_STACK_SIZE;";
    section6.output_section[1].$name = ".fiqstack";
    section6.output_section[1].output_sections_start = "__FIQ_STACK_START";
    section6.output_section[1].output_sections_end = "__FIQ_STACK_END";
    section6.output_section[1].input_section.create(1);
    section6.output_section[1].input_section[0].$name = ". = . + __FIQ_STACK_SIZE;";
    section6.output_section[2].$name = ".svcstack";
    section6.output_section[2].output_sections_start = "__SVC_STACK_START";
    section6.output_section[2].output_sections_end = "__SVC_STACK_END";
    section6.output_section[2].input_section.create(1);
    section6.output_section[2].input_section[0].$name = ". = . + __SVC_STACK_SIZE;";
    section6.output_section[3].$name = ".abortstack";
    section6.output_section[3].output_sections_start = "__ABORT_STACK_START";
    section6.output_section[3].output_sections_end = "__ABORT_STACK_END";
    section6.output_section[3].input_section.create(1);
    section6.output_section[3].input_section[0].$name = ". = . + __ABORT_STACK_SIZE;";
    section6.output_section[4].$name = ".undefinedstack";
    section6.output_section[4].output_sections_start = "__UNDEFINED_STACK_START";
    section6.output_section[4].output_sections_end = "__UNDEFINED_STACK_END";
    section6.output_section[4].input_section.create(1);
    section6.output_section[4].input_section[0].$name = ". = . + __UNDEFINED_STACK_SIZE;";

    section7.load_memory = "OCRAM";
    section7.$name = "Initialization and Exception Handling";
    section7.output_section.create(3);
    section7.output_section[0].$name = ".ARM.exidx";
    section7.output_section[0].palignment = true;
    section7.output_section[1].$name = ".init_array";
    section7.output_section[1].palignment = true;
    section7.output_section[2].$name = ".fini_array";
    section7.output_section[2].palignment = true;

    section8.load_memory = "USER_SHM_MEM";
    section8.type = "NOLOAD";
    section8.$name = "User Shared Memory";
    section8.group = false;
    section8.output_section.create(1);
    section8.output_section[0].$name = ".bss.user_shared_mem";
    section8.output_section[0].alignment = 0;

    section9.load_memory = "LOG_SHM_MEM";
    section9.$name = "Log Shared Memory";
    section9.group = false;
    section9.type = "NOLOAD";
    section9.output_section.create(1);
    section9.output_section[0].$name = ".bss.log_shared_mem";
    section9.output_section[0].alignment = 0;

    section10.load_memory = "RTOS_NORTOS_IPC_SHM_MEM";
    section10.type = "NOLOAD";
    section10.$name = "IPC Shared Memory";
    section10.group = false;
    section10.output_section.create(1);
    section10.output_section[0].$name = ".bss.ipc_vring_mem";
    section10.output_section[0].alignment = 0;

    section11.load_memory = "MAILBOX_HSM";
    section11.type = "NOLOAD";
    section11.$name = "SIPC HSM Queue Memory";
    section11.group = false;
    section11.output_section.create(1);
    section11.output_section[0].$name = ".bss.sipc_hsm_queue_mem";
    section11.output_section[0].alignment = 0;

    section12.load_memory = "MAILBOX_R5F";
    section12.$name = "SIPC R5F Queue Memory";
    section12.group = false;
    section12.type = "NOLOAD";
    section12.output_section.create(1);
    section12.output_section[0].$name = ".bss.sipc_secure_host_queue_mem";
    section12.output_section[0].alignment = 0;

    R5FSS1_1.syscfg

    /**
    * These arguments were used when this file was generated. They will be automatically applied on subsequent loads
    * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
    * @cliArgs --device "AM263Px" --part "AM263P4" --package "ZCZ_F" --context "r5fss1-1" --product "MCU_PLUS_SDK_AM263Px@10.00.00"
    * @v2CliArgs --device "AM263P4" --package "NFBGA (ZCZ-F)" --context "r5fss1-1" --product "MCU_PLUS_SDK_AM263Px@10.00.00"
    * @versions {"tool":"1.22.0+3893"}
    */

    /**
    * Import the modules used in this configuration.
    */
    const default_linker = scripting.addModule("/memory_configurator/default_linker", {}, false);
    const default_linker1 = default_linker.addInstance();
    const general = scripting.addModule("/memory_configurator/general", {}, false);
    const general1 = general.addInstance();
    const region = scripting.addModule("/memory_configurator/region", {}, false);
    const region1 = region.addInstance();
    const section = scripting.addModule("/memory_configurator/section", {}, false);
    const section1 = section.addInstance();
    const section2 = section.addInstance();
    const section3 = section.addInstance();
    const section4 = section.addInstance();
    const section5 = section.addInstance();
    const section6 = section.addInstance();
    const section7 = section.addInstance();
    const section8 = section.addInstance();
    const section9 = section.addInstance();
    const section10 = section.addInstance();
    const section11 = section.addInstance();
    const section12 = section.addInstance();

    /**
    * Write custom configuration values to the imported modules.
    */
    default_linker1.$name = "memory_configurator_default_linker0";

    general1.$name = "CONFIG_GENERAL0";
    general1.linker.$name = "TIARMCLANG0";
    region1.$name = "MEMORY_REGION_CONFIGURATION0";
    region1.memory_region.create(5);
    region1.memory_region[0].type = "TCMA";
    region1.memory_region[0].$name = "R5F_VECS";
    region1.memory_region[0].auto = false;
    region1.memory_region[0].size = 0x40;
    region1.memory_region[1].type = "TCMA";
    region1.memory_region[1].$name = "R5F_TCMA";
    region1.memory_region[1].size = 0x7FC0;
    region1.memory_region[2].type = "TCMB";
    region1.memory_region[2].size = 0x8000;
    region1.memory_region[2].$name = "R5F_TCMB";
    region1.memory_region[3].$name = "OCRAM";
    region1.memory_region[3].auto = false;
    region1.memory_region[3].manualStartAddress = 0x70100000;
    region1.memory_region[3].size = 0x40000;
    region1.memory_region[4].type = "FLASH";
    region1.memory_region[4].auto = false;
    region1.memory_region[4].manualStartAddress = 0x60280000;
    region1.memory_region[4].size = 0x80000;
    region1.memory_region[4].$name = "FLASH";

    section1.load_memory = "R5F_VECS";
    section1.group = false;
    section1.$name = "Vector Table";
    section1.output_section.create(1);
    section1.output_section[0].$name = ".vectors";
    section1.output_section[0].palignment = true;

    section2.load_memory = "OCRAM";
    section2.$name = "Text Segments";
    section2.output_section.create(5);
    section2.output_section[0].$name = ".text.hwi";
    section2.output_section[0].palignment = true;
    section2.output_section[1].$name = ".text.cache";
    section2.output_section[1].palignment = true;
    section2.output_section[2].$name = ".text.mpu";
    section2.output_section[2].palignment = true;
    section2.output_section[3].$name = ".text.boot";
    section2.output_section[3].palignment = true;
    section2.output_section[4].$name = ".text:abort";
    section2.output_section[4].palignment = true;

    section3.load_memory = "OCRAM";
    section3.$name = "Code and Read-Only Data";
    section3.output_section.create(2);
    section3.output_section[0].$name = ".text";
    section3.output_section[0].palignment = true;
    section3.output_section[1].$name = ".rodata";
    section3.output_section[1].palignment = true;

    section4.load_memory = "OCRAM";
    section4.$name = "Data Segment";
    section4.output_section.create(1);
    section4.output_section[0].$name = ".data";
    section4.output_section[0].palignment = true;

    section5.load_memory = "OCRAM";
    section5.$name = "Memory Segments";
    section5.output_section.create(3);
    section5.output_section[0].$name = ".bss";
    section5.output_section[0].output_sections_start = "__BSS_START";
    section5.output_section[0].output_sections_end = "__BSS_END";
    section5.output_section[0].palignment = true;
    section5.output_section[1].$name = ".sysmem";
    section5.output_section[1].palignment = true;
    section5.output_section[2].$name = ".stack";
    section5.output_section[2].palignment = true;

    section6.load_memory = "OCRAM";
    section6.$name = "Stack Segments";
    section6.output_section.create(5);
    section6.output_section[0].$name = ".irqstack";
    section6.output_section[0].output_sections_start = "__IRQ_STACK_START";
    section6.output_section[0].output_sections_end = "__IRQ_STACK_END";
    section6.output_section[0].input_section.create(1);
    section6.output_section[0].input_section[0].$name = ". = . + __IRQ_STACK_SIZE;";
    section6.output_section[1].$name = ".fiqstack";
    section6.output_section[1].output_sections_start = "__FIQ_STACK_START";
    section6.output_section[1].output_sections_end = "__FIQ_STACK_END";
    section6.output_section[1].input_section.create(1);
    section6.output_section[1].input_section[0].$name = ". = . + __FIQ_STACK_SIZE;";
    section6.output_section[2].$name = ".svcstack";
    section6.output_section[2].output_sections_start = "__SVC_STACK_START";
    section6.output_section[2].output_sections_end = "__SVC_STACK_END";
    section6.output_section[2].input_section.create(1);
    section6.output_section[2].input_section[0].$name = ". = . + __SVC_STACK_SIZE;";
    section6.output_section[3].$name = ".abortstack";
    section6.output_section[3].output_sections_start = "__ABORT_STACK_START";
    section6.output_section[3].output_sections_end = "__ABORT_STACK_END";
    section6.output_section[3].input_section.create(1);
    section6.output_section[3].input_section[0].$name = ". = . + __ABORT_STACK_SIZE;";
    section6.output_section[4].$name = ".undefinedstack";
    section6.output_section[4].output_sections_start = "__UNDEFINED_STACK_START";
    section6.output_section[4].output_sections_end = "__UNDEFINED_STACK_END";
    section6.output_section[4].input_section.create(1);
    section6.output_section[4].input_section[0].$name = ". = . + __UNDEFINED_STACK_SIZE;";

    section7.load_memory = "OCRAM";
    section7.$name = "Initialization and Exception Handling";
    section7.output_section.create(3);
    section7.output_section[0].$name = ".ARM.exidx";
    section7.output_section[0].palignment = true;
    section7.output_section[1].$name = ".init_array";
    section7.output_section[1].palignment = true;
    section7.output_section[2].$name = ".fini_array";
    section7.output_section[2].palignment = true;

    section8.load_memory = "USER_SHM_MEM";
    section8.type = "NOLOAD";
    section8.$name = "User Shared Memory";
    section8.group = false;
    section8.output_section.create(1);
    section8.output_section[0].$name = ".bss.user_shared_mem";
    section8.output_section[0].alignment = 0;

    section9.load_memory = "LOG_SHM_MEM";
    section9.$name = "Log Shared Memory";
    section9.group = false;
    section9.type = "NOLOAD";
    section9.output_section.create(1);
    section9.output_section[0].$name = ".bss.log_shared_mem";
    section9.output_section[0].alignment = 0;

    section10.load_memory = "RTOS_NORTOS_IPC_SHM_MEM";
    section10.type = "NOLOAD";
    section10.$name = "IPC Shared Memory";
    section10.group = false;
    section10.output_section.create(1);
    section10.output_section[0].$name = ".bss.ipc_vring_mem";
    section10.output_section[0].alignment = 0;

    section11.load_memory = "MAILBOX_HSM";
    section11.type = "NOLOAD";
    section11.$name = "SIPC HSM Queue Memory";
    section11.group = false;
    section11.output_section.create(1);
    section11.output_section[0].$name = ".bss.sipc_hsm_queue_mem";
    section11.output_section[0].alignment = 0;

    section12.load_memory = "MAILBOX_R5F";
    section12.$name = "SIPC R5F Queue Memory";
    section12.group = false;
    section12.type = "NOLOAD";
    section12.output_section.create(1);
    section12.output_section[0].$name = ".bss.sipc_secure_host_queue_mem";
    section12.output_section[0].alignment = 0;

  • Here are the steps which I followed to successfully create a multicore project for a Sitara.

    1. Using the most recent SDK, in this case mcu_plus_sdk_am263px_10_01_00_31, find the \examples\drivers\tmu\tmu_cores_support\ folder. copy and rename either the cc or lp folder.
    2. Open and edit the following files:
      1. r5fss0-0_nortos\ti-arm-clang\example.projectspec
      2. r5fss0-1_nortos\ti-arm-clang\example.projectspec
      3. r5fss1-0_nortos\ti-arm-clang\example.projectspec
      4. r5fss1-1_nortos\ti-arm-clang\example.projectspec
    3. In each of the example.projectspec edit the title and name field to your desired project names.
    4. In the system_nortos folder, edit the makefile_system_ccs_bootimage_gen file. The MULTI_CORE_APP_PARAMS, MULTI_CORE_APP_PARAMS_XIP, CORE_0_IMG, CORE_1_IMG, CORE_2_IMG, and CORE_3_IMG fields must be updated to match your updated project names.
    5. In the system_nortos folder, edit the system.xml file and update the OUTNAME field.
    6. Import your modified project into CCS.
    7. After your project is imported, open the system.xml file in CCS.
    8. Update the projects assigned to each of the Cortex_R5 fields, then save and close the system.xml file.
  • Hi Nathan,

    Glad to know that it worked for you. And thank you for posting the steps.

    let me know if you have any other questions.