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TM4C1294NCPDT: "PP0 and PQ0 interrupts serve as a master interrupt and provide a legacy aggregated interrupt version" - what does this statement mean?

Abhijit Acharekar
Intellectual 640 points
Part Number: TM4C1294NCPDT

Tool/software:

Dear SupporTeam,

not clear with highlighted text, what's the meaning of master interrupt, what's legacy aggregated interrupt version? If we are going to use PQ0 pin as an digital i/p interrupt pin. do we need to handle differently?

Thank you.

Regards

Abhijit

  • +1
    TI__Guru**** 190806 points

    Hi,

      As you can see from the vector table, each individual PPx pin (e.g. PP0, PP1, PP2,.., PP7) has its individual interrupt vectors. However, you can use PP0 (at vector 92) as a master vector for all PPx pins. For example, if PP3 asserts an interrupt, in the ISR for Port P (at vector 92) you can decode if the interrupt flag for PP3 is set. The reason that is legacy is because in the previous generation of the MCU, PP and PQ are much like the rest of ports such as PA, PB and etc which only has one vector allocated for the entire port, not individual bits.