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AM263P4-Q1: SDFM Sync

Part Number: AM263P4-Q1


Tool/software:

Hey Experts,

if i get it correctly from the academy side:

the SDFM data rdy interrupt is only synced one time to the PWM?

i want that only a PWM SOCA event triggers a SDFM data read, and this a data rdy Interrupt.
That should be repeated again and again.
How can i achive this?

At the moment i get a new data interrupt based on the choosen data rate of the SDFM module. 

Best regards,

Marcel

  • Hey Marcel,

    You need to enable the wait for PWM sync mode with SDFM_enableWaitForSync() and configure the PWM sync source with SDFM_setPWMSyncSource(). This will enable the functionality you see in diagram where the SDFM Data Ready interrupt will be available after the defined (OSR) count of SD CLK cycles.

    Best Regards,

    Zackary Fleenor

  • Hey,

    i do this already. 
    But in the diagramm you see its only synced one time to the PWM and then its freerunning. 
    So the next SDFM interrupt doesn't occour 256 OSCs after PWM sync. Instead its triggered 256 OSCs after the last interrupt was triggered.

    Best regards

    Marcel

  • Hey Marcel,

    I see. Can you share your configuration code here for review?

    Best Regards,

    Zackary Fleenor

  • Hey Fleenor,
    its not about my implementation, its more about how can i achive what i want.
    In the diagram it is Sync->256 OSCs -> Interrupt ->256OSCs -> Interrupt -> 256 OSCs -> Interrupt ....
    What i want is Sync -> 256 OSCs -> Interrupt -> Sync ->256OSCs -> Interrupt -> Sync ->256OSCs -> Interrupt ...
    Is it possible to achive this?

    Best regards,

    Marcel

  • Hey Marcel,

    Your question has been understood. I am looping in a fellow software expert to provide additional information for this application. Please allow till the end of the week for review.

    Best Regards,

    Zackary Fleenor

  • Hi Marcel,

    If I understand correctly, you want to read the data from the SDFM only when the EPWM sync happens and this could be longer interval than your 256 OSR DR Rdy interrupts. Could you confirm my understanding?

    • If the above is correct understanding and expecting you have a EPWM interrupt timed with your SYNC signal, clear the SDFM INT Flags from that EPWM ISR, instead of clearing them in the SDFM ISR. 
    • This will make sure you get a SDFM DR RDY interrupt from only after the sync signal has reached. otherwise not, even though the SDFM is free running after each SYNC signal. 

    Thanks and regards,

    Madhava