AM2634: Not able connect to Ethernet on Custome board with AM2634

Hello Ajit,

Are you using Ethernet through the CPSW, PRU-ICSS or both? Is this connected through MDIO, MII, RMII, or RGMII?

Best Regards,

Ralph Jacobi

Hi Ralph,

We are using CPSW and connected through RGMII. Please refer below snpashot.

Hi Ralph,

I have measure voltage across RBIAS resistor as per below test mentioned in DP83869 troubleshooting steps.

It was 309mv instead of 1V

What could be the issue?

Regards,

Ajit

Ajit,

One issue may be with the load capacitors on the 25MHz crystal. According to the DP83869 data sheet, the load capacitors CL1 and CL2 must each be equal to 2x the specified load capacitance from the crystal vendor’s data sheet:

Can you check this first?

Regards,

Brennan

Hi Brennan,

I have changed capacitor 18pf from 12pf. Capacitor mentioned in crystal datasheet "ABM10W-25.0000MHZ-8-K1Z-T3" is 8pF. So we have tried with 18pf.

We have recevied below clock diagram.

XO

XI

Please verify. 

Also, Voltage at RBIAS pin is not 1V. It is 350mv

Hi Ajit,

I am checking your issue with an applications engineer that supports the DP83869 device, and hope to have an answer for you later today.

Regards,

Brennan

Sure Thanks Brennan!

Hi Ajit,

RBIAS at 350mV is likely a symptom of PHY not powering properly.

XI voltage level does not look to satisfy VIL/VIH thresholds:

Without valid XI clock input on power, the PHY is not expected to power & function correctly.

Can you please check with the crystal vendor if this crystal can support driving strength to meet these thresholds?

Thank you,

Evan

Thanks Evan!

I will measure voltage and check for crystal threshold levels. Do you have any recommendation for crystal part number that we can try? Please let us know 

Hi Ajit,

We have validated with crystal ECS-250-12-33Q-JES-TR on DP83869EVM.

Is the crystal placed near the PHY in your layout? I'd like to rule out attenuation due to trace layout.

Thank you,

Evan

Hi Evan,

Yes, we have mounted crystal close to DP83869 as shown below.

Ajit,

Crystal placement looks fine. Are there any additional issues or can I close this thread?

Hi Brennan,

Thanks for the support!

Still the issue has not resolved. Working with Team from TI to solve the issue and using this ticket as reference.

So, requesting you to not close this ticket for now. Once the issue gets resolved, I will update here.

Ok, sounds good.