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AM2634: Problem with ePWM counter and shadow

Part Number: AM2634
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

I am implementing PWM modulation for a three-level converter on the AM2634 Control Card, utilizing 6 ePWM units. These units are configured to operate in up-down mode with a period of 1ms, and they are synchronized with each other. The 'Enable Phase Shift Load' option is enabled on all 6 ePWM units, along with the shadow functionality.

After coding the calculation for the Compare registers, I tested the system by recording the PWM gate signals on an oscilloscope. I then saved and imported the data(gate signals on HSEC connector) into the simulation software (Plecs) to evaluate the accuracy of the generated voltage and verify the correctness of the gate signals from the AM2634.

In Plecs, I connected the gate signals to an inverter and calculated the periodic average value of the generated phase voltage with 1ms averaging period (which corresponds to the PWM switching period). The comparison of the voltage generated by the gate signals and the reference voltage (the ref. voltage input to the modulator in the AM2634) is shown in the attached image. The green trace represents the reference voltage, while the red trace shows the voltage generated by the gate signals recorded from the AM2634 and imported into Plecs. As you can see, the modulator operates correctly most of the time, except for an error that appears approximately every 60°, or something similar. Each error last excactly one PWM period.

Furthermore, I have tried numerous different settings for the ePWM units, check ref. voltages, but the issue persists. One of the checks I performed involved saving the values of active compare registers of the AM2634 in arrays (in time interapt with a time interval 100 times smaller than the PWM switching period), exporting them to a .csv file, and importing them into the simulation software. In the simulation, I connected the values to the comparators, and in this case, the problem does not occur. This suggests that the calculation of the compare values is not the issue.

In the implementation on the AM2634, the reference alpha-beta voltages sent to the modulator are calculated in the PWM interrupt, which is triggered in the middle of the switching period (when the counter reaches maximum). The shadow functionality is enabled on all 6 PWM units, and it is configured so that the shadow-to-active load transition occurs when the counter reaches zero.

To verify this, I checked the behavior and it appears that the shadow functionality is not operating as expected (or maybe I'm reading shadow register?). Specifically, the Active compare registers for the ePWM units seem to be updated immediately, rather than when the counter reaches zero. This update happens approximately when the counters reach their maximum, right after the compare values are calculated in the ePWM interrupt. The image below illustrates the counter content of the ePWM0 unit and the values of the Active compare register of ePWM0. As it can be seen, it appears that the Active compare register is updated during the middle of the switching period, rather than at the end.

I obtained this data(counter content and Active compare register content of ePWM0) by saving the counter contents and Active Compare register values in arrays, then exporting them to a .csv file. The counter contents for ePWM0 were read from memory location 0x50000008, and the Active Compare register content were read from 0x500000D6. I also attempted to read the  Compare register of ePWM0 using the EPWM_getCounterCompareValue command, and the result was the same.

The important settings of the ePWM0 unit (ePWM0 generates sync-out pulses for the remaining 5 ePWM units and generates an interapt in the middle of the switching period to update the Compare Values) are as shown in the following figure:

Is it possible that the shadow functionality is not working or is there some other problem I can not see?

I also noticed an strange behavior in the PWM unit counters, which I observed on two different units (out of six), and the same issue occurs with both (remaining four I didn't check). As shown in the image below, the ideal counter (perfectly symmetrical) is represented in red, while the ePWM0 unit counter on the AM2634 is shown in green. The green signal was obtained as described earlier, by writing to a array in the fast time interrupt and exporting the data to CSV.

It is evident that there are changes in slope in the signal. At this point, I am not sure whether this green signal is accurate, or if it’s caused by delays in the time interrupt used to sample the counter value (the sampling interrupt is set with the highest priority). If the green signal is correct as shown, then it seems that the counter becomes asymmetrical at times, meaning the duration of the count-down is not equal to the duration of the count-up. This can be clearly seen in the two marked periods.

Any help will be very welcome.

  • Hi Nikola

    From what I understand, your core problems seem to be:

    • Unexpected Active Compare Register Updates: The active compare registers appear to be updating in the middle of the PWM cycle (near the peak) instead of at zero, despite the shadow-to-active load being configured for counter zero.
    • ePWM Counter Asymmetry: The ePWM counter exhibits slope changes, suggesting that the up-counting and down-counting durations are not always equal.

    Please correct me if I am wrong.

    I'll try to reproduce this issue although I won't be able to use plecs. Please give me any additional information you think I'll need to reproduce your scenario.

    Regards,
    Akshit

  • Dear Akshit,

    thank you for your support.

    Yes, you are correct; you have correctly understood my issues.

    Firstly, I am pleased to inform you that I have successfully resolved the problem. The issue with incorrect voltages generated every 60° was eliminated after I enabled the following options in the Action Qualifier on all 6 ePWM units:

    EPWMXA OutputEvent Output Configuration

    EPWMXA TBCTR Equals Zero = Set output pins to low

    EPWMXA TBCTR Equals Period = Set output pins to High

     

    EPWMXB OutputEvent Output Configuration

    EPWMXB TBCTR Equals Zero = Set output pins to High

    EPWMXB TBCTR Equals Period = Set output pins to low

    The issue occurred when the output pin configuration options had 'No Change' enabled for the output pins. For the modulator to function correctly, it must be configured as shown in the figure below.
    I don't fully understand why this is the case, but the issue is no longer present.

    Regarding the shadow functionality, it seems that is working, although reading the Active Compare register suggests opposite. However, when I tried disabling it, the problem worsened, and the accuracy of the generated voltage decreased. This leads me to believe the shadow functionality is working, despite the Active Compare register suggests it isn’t. Additionally, I did not observe any unexpected strange pulses on the oscilloscope that would suggest the shadow functionality is not functioning properly. Therefore, I assume I was reading the shadow value, not the Active Compare register, though I am unsure why.

    I located the memory address I was reading using the debugger. In the Registers tab, I found the Active Compare register (at least, that's what it was labeled as), and clicked 'View at memory address.' So, I don’t understand why it would correspond to a shadow register.

    To verify the Active Compare register, I implemented a time interrupt with a 10 µs period, as shown in the Figure below. In the interrupt service routine, I save the contents of the ePWM counter and compare register:

    After that, I export the fields to a .csv file and plot them using any graph plotting tool.

    Do you know how to correctly read the Active Compare register or what I might be doing wrong when checking the contents of this register?

    Regarding the unusual behavior of the counter (asymmetries and changes in the counter slope), I believe it would be worthwhile to investigate further to determine if this is truly the case or if there’s another issue that I’m not seeing. If you closely examine the image where the counter of the AM2634 ePWM unit is compared to the ideal triangular signal, you can clearly see that in the middle two periods (between the marked ones), the ideal triangular signal aligns very well with the one from the AM2634 ePWM unit (ignoring the slope change). However, looking at the marked periods, it becomes evident that asymmetry suddenly appears, and then disappear again, suggesting that asymmetric signals emerge every few periods. Some periods are perfectly symmetrical, while others are not.

    It maybe might be usefull if you try to reproduce counter’s asymmetry. You don’t need Plecs for this; any tool that can plot graphs and generate an ideal triangular signal (e.g., Matlab, Python, GNU Octave) should suffice. You can then compare the signal exported from the AM2634 with the ideally generated triangular signal. The method I used is as I explained earlier, I save the counter contents to a field in time interapt, export it to a .csv file, and then compare it to the ideal triangular signal.

    I can send you the sysconfig file, but I couldn’t find your email address. 

    Once again, thank you very much for your help.

    Best Regards

    Nikola