Tool/software:
I have attempted enabling FPU traps using this code:
vmrs r0, fpscr
movw r1, #0x9F00
movt r1, #0x03C0
bic r0, r0, r1
movw r1, #0x0700
movt r1, #0x0100
orr r0, r0, r1
vmsr fpscr, r0
However, the value of FPSCR does not change accordingly and no traps are triggered when FPU exceptions (e.g. division by zero) are produced.
I have already confirmed that in my division by zero test the operator loading and division instructions are being executed, but Inf is produced as output and no exception is being triggered.
How should I proceed to enable FPU traps?
Regards,
Luís