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AM261x-LP ospi1 flash example

Shengzhe Hong
Prodigy 20 points
Part Number: LP-AM261
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

Hi,

I want to add a custom nor flash by using ospi1, so I tried to run ospi flash diag example on the AM261x-LP board. And I can get the ospi0 info output just like the sample one. 

But when I tested the ospi1 on board flash, it can not work. The output showed wrong flash id, also "Some tests have failed!".

BTW, I am using ccs 20.0.1 and uart bootloader. 

Please tell me how to solve this.

  • 0
    TI__Expert 3170 points

    Hi Shengzhe Hong,

    From my understanding the present mcu_plus_sdk_am263px_10_01_00_31 is suported till CCS 12.8.1
    Please use this version of CCS and check for updated in Help -> Check for updates



    Before changing the flash to OSPI1 in example.sysconfig, ensure that OSPI signal pins are locked 


    Thanks & Regards,
    Rijohn



  • 0 in reply to Rijohn Pius
    Prodigy 20 points

    Hi Rijohn,

    Thanks for your reply. While I am using am261x MCU, instead of am263px. And I have switched CCS to version 12.8.1.

    But still, I met the same error. Running ospi flash diagnostic example of ospi0 is fine, but not working at ospi1.

    sysconfig

    error info

    Also, I tried to run ospi flash dual io example, the output info just like this:

    dual io error info

    So I still dont know whether the ospi1 can work or not.

    Is there anything else I need to modified to running these two examples?

  • 0 in reply to Shengzhe Hong
    TI__Expert 3170 points

    Hi Shengzhe,

    Can you please share the example.sysconfig file. and screenshot of OSPI tab in sysconfig.
    From the screenshot above the input clock frequency looks wrong. Can you try making it 166666666 (166MHz    ) 

    Regards,
    Rijohn

  • 0 in reply to Rijohn Pius
    Prodigy 20 points

    Hi Rijohn,

    It seems that I can not upload example.sysconfig file directly, so I have to upload the zip file.

    73067.example.zip

    And I have changed input clock frequency to 166MHz, it still dont work.

  • 0 in reply to Shengzhe Hong
    TI__Expert 3170 points

    Hi Shengzhe,

    Thank you for the reply.
    Can you please check if this .out works?

     https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/908/ospi_5F00_flash_5F00_diag.debug.out

    Regards,
    Rijohn

  • 0 in reply to Rijohn Pius
    Prodigy 20 points

    Hi Rijohn,

    Thanks for your work.
    I have run this .out file on the board. It can get the correct ID info of Flash this time, but it would be stuck at "Performing Write-Read Test".

  • 0 in reply to Shengzhe Hong
    TI__Expert 3170 points

    Hi Shengzhe,

    Thank you for the response.

    Looks like there is some difference in the driver level in the early release version.
    I am forwarding this query to SDK team to provide information about the driver changes.

    Regards,
    Rijohn

  • 0 in reply to Rijohn Pius
    Prodigy 20 points

    Hi Rijhon,

    Glad to know you have located the problem, and looking forward to your reply to me about the solution asap.

    Thanks!

  • 0 in reply to Rijohn Pius
    Prodigy 20 points

    Hi Rijhon,

    I am still working on that ospi1 issue. Any progress?

    And could you please provide the project file?

    Thanks!

  • 0 in reply to Shengzhe Hong
    TI__Expert 3170 points

    Hi Shengzhe,

    Thank you for your patience.

    MCU+SDK team will share the updated patch file before End of the week.

    Thanks & Regards,
    Rijohn

  • 0 in reply to Rijohn Pius
    TI__Expert 3170 points

    Hi Shengzhe,

    Can you please try this .out?
    https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/908/ospi_5F00_flash_5F00_diag.debug_2800_1_2900_.out

    Thanks & Regards,
    Rijohn

  • 0 in reply to Rijohn Pius
    Prodigy 20 points

    Hi Rijohn,

    It worked perfectly!

  • 0 in reply to Shengzhe Hong
    TI__Expert 3170 points

    Hi Shengzhe,

    Glad to hear that !!
    I will share the new patch as soon as I get it from SDK team (before EOW).

    Thanks & Regards,
    Rijohn

  • 0 in reply to Rijohn Pius
    Prodigy 20 points

    Hi Rijohn,

    Thanks a lot! And I can work on other parts for a while before receiving your reply.

  • 0 in reply to Rijohn Pius
    Prodigy 20 points

    Hi Rijohn,

    I'd like to know if there's been any progress?

  • +1 in reply to Shengzhe Hong
    TI__Expert 3170 points

    Hi Shengzhe,

    Thank you for your patience.

    Steps to Apply OSPI1 macronix Patch

    1. Open terminal at C:\ti\mcu_plus_sdk_am261x_10_00_01_10
    2. git init
    3. Copy .gitignore file to C:\ti\mcu_plus_sdk_am261x_10_00_01_10
      1.  https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/908/.gitignore
    4. Stage these files and do an initial commit.
    5. Now apply the new patch file : git apply <.patch file>

      1. https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/908/ospi_5F00_changes_5F00_macronix.patch
    6. Copy the MX25UW064.json file to the below path: C:\ti\mcu_plus_sdk_am261x_10_00_01_10\source\sysconfig\board\.meta\flash
      1. Fullscreen MX25UW064.json Download 
        {
	"flashSize": 8388608,
	"flashPageSize": 256,
	"flashManfId": "0xC2",
	"flashDeviceId": "0x8137",
	"flashBlockSize": 65536,
	"flashSectorSize": 4096,
	"cmdBlockErase3B": "0xD8",
	"cmdBlockErase4B": "0xDC",
	"cmdSectorErase3B": "0x20",
	"cmdSectorErase4B": "0x21",
	"protos": {
		"p111": {
			"isDtr": false,
			"cmdRd": "0x03",
			"cmdWr": "0x02",
			"modeClksCmd": 0,
			"modeClksRd": 0,
			"dummyClksCmd": 0,
			"dummyClksRd": 0,
			"enableType": "0",
			"enableSeq": "0x00",
			"dummyCfg": null,
			"protoCfg": null,
			"strDtrCfg": null
		},
		"p112": {
			"isDtr": false,
			"cmdRd": "0xFF",
			"cmdWr": "0x02",
			"modeClksCmd": 0,
			"modeClksRd": 0,
			"dummyClksCmd": 0,
			"dummyClksRd": 0,
			"enableType": "0",
			"enableSeq": "0x00",
			"dummyCfg": null,
			"protoCfg": null,
			"strDtrCfg": null
		},
		"p114": {
			"isDtr": false,
			"cmdRd": "0xFF",
			"cmdWr": "0x02",
			"modeClksCmd": 0,
			"modeClksRd": 0,
			"dummyClksCmd": 0,
			"dummyClksRd": 0,
			"enableType": "0",
			"enableSeq": "0x00",
			"dummyCfg": null,
			"protoCfg": null,
			"strDtrCfg": null
		},
		"p118": null,
		"p444s": null,
		"p444d": null,
		"p888s": null,
		"p888d": {
			"isDtr": true,
			"cmdRd": "0xEE",
			"cmdWr": "0x12",
			"modeClksCmd": 0,
			"modeClksRd": 0,
			"dummyClksCmd": 4,
			"dummyClksRd": 20,
			"enableType": "0",
			"enableSeq": "0x04",
			"dummyCfg": {
				"isAddrReg": true,
				"cmdRegRd":"0x71",
				"cmdRegWr":"0x72",
				"cfgReg":"0x03",
				"shift":0,
				"mask":"0x01",
				"bitP":3
			},
			"protoCfg": {
				"isAddrReg": true,
				"cmdRegRd": "0x71",
				"cmdRegWr": "0x72",
				"cfgReg": "0x00000000",
				"shift": 1,
				"mask": "0x02",
				"bitP": 1
			},
			"strDtrCfg": {
				"isAddrReg": true,
				"cmdRegRd": "0x71",
				"cmdRegWr": "0x72",
				"cfgReg": "0x00000000",
				"shift": 1,
				"mask": "0x02",
				"bitP": 1
			}
		},
		"pCustom": {
			"fxn": null
		}
	},
	"addrByteSupport": "2",
	"fourByteAddrEnSeq": "0x20",
	"cmdExtType": "INVERSE",
	"resetType": "0x10",
	"deviceBusyType": "1",
	"cmdWren": "0x06",
	"cmdRdsr": "0x05",
	"srWip":  0,
	"srWel":  1,
	"cmdChipErase": "0xC7",
	"rdIdSettings": {
		"cmd": "0x9F",
		"numBytes": 5,
		"dummy4": 0,
		"dummy8": 8,
		"addressBytesSize": 0
	},
	"xspiWipRdCmd": "0x05",
	"xspiWipReg": "0x00000000",
	"xspiWipBit": 0,
	"flashDeviceBusyTimeout": 76000000,
	"flashPageProgTimeout": 152,
	"supportedProtocols" : [
		{ name : "1s_1s_1s", displayName : "1S-1S-1S" },
		{ name : "1s_1s_2s", displayName : "1S-1S-2S" },
		{ name : "1s_1s_4s", displayName : "1S-1S-4S" },
		{ name : "8d_8d_8d", displayName : "8D-8D-8D" },
	]
}
    7. Once the above steps are done build these libraries: 
      1. gmake -sj libs-scrub PROFILE=debug
      2. gmake -sj12 libs PROFILE=debug
    8. Import the OSPI_diag example in CCS
    9. Add new MPU region in sysconfig as in below image

    10. Confirm the OSPI instance is set to OSPI1 and Signals/Pins are set correctly as below:
    11. Save the example.syscfg file and build the application and run:

      1. [Cortex_R5_0] [OSPI Flash Diagnostic Test] Starting ...
[OSPI Flash Diagnostic Test] Flash Manufacturer ID : 0xC2
[OSPI Flash Diagnostic Test] Flash Device ID : 0x8137
[OSPI Flash Diagnostic Test] Executing Flash Erase on first block...
[OSPI Flash Diagnostic Test] Done !!!
[OSPI Flash Diagnostic Test] Performing Write-Read Test...
[OSPI Flash Diagnostic Test] Write-Read Test Passed!
[QSPI Flash Diagnostic Test] SFDP Information :
================================================
SFDP
================================================
SFDP Major Revision : 0x1
SFDP Minor Revision : 0x8
Number of Parameter Headers in this Table : 5

Types of Additional Parameter Tables in this flash
---------------------------------------------------
STATUS CONTROL AND CONFIGURATION REGISTER MAP TABLE
OCTAL DDR MODE COMMAND SEQUENCE TABLE
NOR SPI PROFILE TABLE
4 BYTE ADDRESSING MODE INSTRUCTIONS TABLE

Parsing of OCTAL DDR MODE COMMAND SEQUENCE TABLE table not yet supported.
JSON Data for the flash :

{

"flashSize": 8388608,
"flashPageSize": 256,
"flashManfId": "0xC2",
"flashDeviceId": "0x8137",
"flashBlockSize": 65536,
"flashSectorSize": 4096,
"cmdBlockErase3B": "0xD8",
"cmdBlockErase4B": "0xDC",
"cmdSectorErase3B": "0x20",
"cmdSectorErase4B": "0x21",
"protos": {
"p111": {
"isDtr": false,
"cmdRd": "0x03",
"cmdWr": "0x02",
"modeClksCmd": 0,
"modeClksRd": 0,
"dummyClksCmd": 0,
"dummyClksRd": 0,
"enableType": "0",
"enableSeq": "0x00",
"dummyCfg": null,
"protoCfg": null,
"strDtrCfg": null
},
"p112": {
"isDtr": false,
"cmdRd": "0xFF",
"cmdWr": "0x02",
"modeClksCmd": 0,
"modeClksRd": 0,
"dummyClksCmd": 0,
"dummyClksRd": 0,
"enableType": "0",
"enableSeq": "0x00",
"dummyCfg": null,
"protoCfg": null,
"strDtrCfg": null
},
"p114": {
"isDtr": false,
"cmdRd": "0xFF",
"cmdWr": "0x02",
"modeClksCmd": 0,
"modeClksRd": 0,
"dummyClksCmd": 0,
"dummyClksRd": 0,
"enableType": "0",
"enableSeq": "0x00",
"dummyCfg": null,
"protoCfg": null,
"strDtrCfg": null
},
"p118": null,
"p444s": null,
"p444d": null,
"p888s": null,
"p888d": {
"isDtr": true,
"cmdRd": "0xEE",
"cmdWr": "0x12",
"modeClksCmd": 0,
"modeClksRd": 0,
"dummyClksCmd": 4,
"dummyClksRd": 20,
"enableType": "0",
"enableSeq": "0x04",
"dummyCfg": {
"isAddrReg": true,
"cmdRegRd":"0x71",
"cmdRegWr":"0x72",
"cfgReg":"0x00000003",
"shift":0,
"mask":"0x01",
"bitP":0
},
"protoCfg": {
"isAddrReg": true,
"cmdRegRd": "0x71",
"cmdRegWr": "0x72",
"cfgReg": "0x00000000",
"shift": 0,
"mask": "0x00",
"bitP": 0
},
"strDtrCfg": {
"isAddrReg": true,
"cmdRegRd": "0x71",
"cmdRegWr": "0x72",
"cfgReg": "0x00000000",
"shift": 1,
"mask": "0x00",
"bitP": 1
}
},
"pCustom": {
"fxn": null
}
},
"addrByteSupport": "1",
"fourByteAddrEnSeq": "0x20",
"cmdExtType": "INVERSE",
"resetType": "0x10",
"deviceBusyType": "1",
"cmdWren": "0x06",
"cmdRdsr": "0x05",
"srWip": 0,
"srWel": 1,
"cmdChipErase": "0xC7",
"rdIdSettings": {
"cmd": "0x9F",
"numBytes": 5,
"dummy4": 0,
"dummy8": 0
},
"xspiWipRdCmd": "0x05",
"xspiWipReg": "0x00000000",
"xspiWipBit": 0,
"flashDeviceBusyTimeout": 20000000,
"flashPageProgTimeout": 152
}

All tests have passed!!


    Thanks & Regards,
    Rijohn


          

  • 0 in reply to Rijohn Pius
    Prodigy 20 points

    Hi Rijohn,

    I followed the steps, and it worked.

    Thanks again to you and your teammates