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MSPM0G1506: UART baud error when operating UART with Internal HF system clock (SYSOSC)

ilanchezhian Thingalkodi
Intellectual 350 points
Part Number: MSPM0G1506
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

Hi 

Could you provide information on the baud rate error percentage for the UART communication module in the MSPM0G1506 when using the internal clock source? We are considering avoiding the use of external LFCLK and HFCLK due to cost constraints. Specifically, we need to know if using the internal LFXTAL (32KHz) is sufficient, or if the external LFXTAL is mandatory. Additionally, as this UART interface operates in PD0 (low power domain), what would be the maximum input clock frequency for the UART peripheral, and are there any limitations in achieving higher baud rates such as 115200 or greater?

With Regards

Ilan 

  • 0
    TI__Expert 3450 points

    Hi Ilan,

    ilanchezhian Thingalkodi said:
    Could you provide information on the baud rate error percentage for the UART communication module in the MSPM0G1506 when using the internal clock source?

    Generally,  the UART baud rate error mainly includes clock source error and calculation error. As for clock source error, you can find it in the mspm0g1506_datasheet chapter 7.9, and as for calculation error, the easiest way to know is by Sysconfig tools which is shown as below, you can type in the Target Baud Rate and it will automatically give the calculated error result, also you can refer to the mspm0g1506_TRM  chapter 18.2.3.4 Baud Rate Generation for more details.

    ilanchezhian Thingalkodi said:
    as this UART interface operates in PD0 (low power domain), what would be the maximum input clock frequency for the UART peripheral

    You can find this information in the datasheet which is shown as below.

    ilanchezhian Thingalkodi said:
    and are there any limitations in achieving higher baud rates such as 115200 or greater?

    Just as mentioned before, the baud rate accuracy is related to the clock source and divisor ratio stored in Baud-Rate Divisor which cause calculated error. If you want a higher baud rate, it's important to ensure that the set baud rate can effectively reduce the calculation error, and whether it can tolerate the impact of the clock source error, and also, the external environmental interference in high-speed communication cannot be ignored.

    Best Regards,
    Peter