Other Parts Discussed in Thread: SYSCONFIG
Tool/software:
Hi experts,
I am using motor_control_sdk_am243x_09_02_00_09, CCS 12.6, SysConfig 1.21.1.
Starting from the uart_echo_dma_lld example, I tried to move the transfer buffers to TCM memory, which was suggested by TI experts.
#define APP_UART_BUFSIZE (0x100U)
__attribute__((aligned(256), section(".data.tcma")))
uint8_t gUartBuffer[APP_UART_BUFSIZE];__attribute__((aligned(256), section(".data.tcma")))
uint8_t gUartReceiveBuffer[APP_UART_BUFSIZE];
MAP file:
00000100 gUartBuffer
00000200 gUartReceiveBuffer
Once I do this, I get only \0 characters out of the UART. The number of \0 characters fits with the length of the strings that should be there. This does not change if I set the TCMA to cached or non-cached in the sysconfig, or if I remove the CacheP_wb() and CacheP_inv()-operations from the code.
I guess that maybe the address range 0x0000000 for TCMA ist not right from the DMA controller's point of view. It should be corrected in the Udma_defaultVirtToPhyFxn() function. But I could not get the correct address range out of the spruim2h manual, Memory map section.
Is this true? If so, could you provide me the address range where the DMA controller would access the TCMA/ TCMB memory of each core?
BR
Alexander