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LP-AM243: Logging from the same UART interface for all cores

Part Number: LP-AM243
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

Hi;

I want to assign the interface for UART logging of all cores to USART0. However, when I make this assignment from the sysconfig DebugP tab from multiple cores, I get a conflict error as expected. 
In short, I want to use USART0 for logging function of all cores.

How can I provide this functionality? Maybe there is a way to do this using the DebugP_shmLogRead() method? 

Is it possible to write the logging data of all cores to shared memory with one method and then send it via USART0 with a single core using the DebugP_shmLogRead method?

Regards
Kadir

  • Hi Kadir,

    I have not yet tried using DebugP_shmLogRead, but I think you could do so, but for a nortos application.

    Regards,
    Vaibhav

  • Hi,

    Please look through the implementation of the example called cdc_echo.

    C:\ti\mcu_plus_sdk_am64x_10_01_00_32\examples\usb\device\cdc_echo\am64x-evm\r5fss0-1_nortos\ti-arm-clang

    C:\ti\mcu_plus_sdk_am64x_10_01_00_32\examples\usb\device\cdc_echo\am64x-evm\r5fss0-0_nortos\ti-arm-clang

    R50_1 NoRtos makes use of the DebugP_shmLogRead().

    Regards,

    Vaibhav

  • Valibhav: if I recall correctly, there would be no way to do this on AM6x if one tried to setup a common UART interface between A53 and R5 cores - true?

    thanks

    Jim

  • Hi,

    there would be no way to do this on AM6x if one tried to setup a common UART interface between A53 and R5 cores - true?

    I am not sure if someone has tried this or if this is an IP limitation.

    But between R cores, it seems like its possible based on the above example I shared.

    Regards,

    Vaibhav

  • Vaibhav - can you please ask (22) Nick Saulnier's Profile - Nick Saulnier - TI E2E support forums to comment on that?  I know that one can assign an SoC UART block to either an A53 or R5 core - but I wonder if one could dynamically reconfigure the assignment - or share the UART perpiheral between those cores.

    Jim

  • Hello Kadir,
    1) Please confirm exactly which cores you want to write to the UART peripheral (e.g., all of the MCU+ cores? all of the MCU+ cores, and also Linux?)
    2) What OS do you want running on each of the cores? (e.g., on R5F, FreeRTOS, bare metal or NORTOS, something else? etc)

    Hello Vaibhav,
    to clarify: Are you saying that you would expect that DebugP_shmLogRead only works with NORTOS? Or are you just saying that the current examples are written with NORTOS, but it would still work with FreeRTOS?

    Regards,

    Nick

  • Apologies, I am seeing that we are using AM243x. So no Linux or A53 cores here.

    From a conceptual standpoint, only one software instance should control a specific peripheral. However, if there is a driver in place that allows every core to write to the same shared memory region, and then only one core controls the UART that prints data from that shared memory region, that would be fine.

    Regards,

    Nick

  • Hi Nick;

    That's right. it is necessary to control UART instance from only one software instance. 
    My question is; are there any SDK methods that will allow each core to write to the shared memory and only one core to print the log in the shared memory?

    For example from core 0-0 DebugP_writeSharedmemory....
                         from core 1-0 DebugP_printSharedMemoryLog.... (Debug is configured as UART in sysconfig) or something like  DebugP_shmLogRead

    Or if any other mechanism support this concept by SDK???


    Thanks

  • Btw, I use FreeRTOS, I want to send all logs via UART on core 0-1, and share log by core 0-0 and others

  • Hi,

    Thanks for your patience.

    Btw, I use FreeRTOS, I want to send all logs via UART on core 0-1, and share log by core 0-0 and others

    Let me check the feasibility on this one using FreeRTOS.

    I understand your flow:

    So a core writes to a shared memory and the other core reads from the shared memory.

    Regards,

    Vaibhav

  • Hi,

    Yes this is my flow. All 4 cores writes logging data into the shared memory, 5th core (core 0-1) sends logging data that is in shared memory via UART.
    If there is a API that helps for this process, I would be very happy to learn it. (DebugP is candidate but not sure)

    Regards
    Kadir

  • Yes this is my flow. All 4 cores writes logging data into the shared memory, 5th core (core 0-1) sends logging data that is in shared memory via UART.
    If there is a API that helps for this process, I would be very happy to learn it. (

    Thanks for specifying.