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MSPM0G3507: MCLK switching causes

Bhushan Khole
Prodigy 50 points
Part Number: MSPM0G3507
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

I am using below code in FreeRTOS, with below code in ti_msp_dl_config.c file. 

SYSCONFIG_WEAK void SYSCFG_DL_SYSCTL_init(void)
{

    //Low Power Mode is configured to be SLEEP0
    DL_SYSCTL_setBORThreshold(DL_SYSCTL_BOR_THRESHOLD_LEVEL_0);
    //DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_4M);
    DL_SYSCTL_configSYSPLL((DL_SYSCTL_SYSPLLConfig *) &gSYSPLLConfig);
    DL_SYSCTL_setULPCLKDivider(DL_SYSCTL_ULPCLK_DIV_1);
    //DL_SYSCTL_setMCLKSource(SYSOSC, HSCLK, DL_SYSCTL_HSCLK_SOURCE_SYSPLL);
       
}
If I uncomment DL_SYSCTL_setMCLKSource code line, few of my MCU devices get lock-out. I mena some corruption occurs, and I nee dto get into BSL mode to recover.
Wonder what can be wrong here?  Note I am using internal clock for MCU.
Regards,
Bhushan
  • 0
    TI__Expert 5440 points

    Hi Bhushan,

    I notice that you comment  “DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_4M)”，according to the MSPM0G3507_TRM, MCLK is sourced from SYSOSC by default, therefore, it is necessary to uncomment it to ensure that the SYSOSC configuration is complete before setting the MCLK.

    Best Regards,
    Peter

  • 0 in reply to Peter Jiang
    Prodigy 50 points

    Hello Peter,

    Thanks for checking on this query.

    Yes, this line shouldn't be commented.  But I am sure the code is running into problems with that, since the debugger stops responding and throws message

    "Failed to remove the debug state from the target before disconnecting.  There may still be breakpoint op-codes embedded in program memory.  It is recommended that you reset the emulator before you connect and reload your program before you continue debugging."

    After this I need to get the MCU in BSL mode, to get the device working. Unless I comment the MCLK change code, everytime the debugger would lock up and code won't proceed, 

    My modified code now works with below line:

    SYSCONFIG_WEAK void SYSCFG_DL_SYSCTL_init(void)
    {


        //Low Power Mode is configured to be SLEEP0
        DL_SYSCTL_setBORThreshold(DL_SYSCTL_BOR_THRESHOLD_LEVEL_0);
        DL_SYSCTL_setFlashWaitState(DL_SYSCTL_FLASH_WAIT_STATE_2);

       
        DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE);
        DL_SYSCTL_configSYSPLL((DL_SYSCTL_SYSPLLConfig *) &gSYSPLLConfig);
        DL_SYSCTL_setULPCLKDivider(DL_SYSCTL_ULPCLK_DIV_1);
        // DL_SYSCTL_setMCLKSource(SYSOSC, HSCLK, DL_SYSCTL_HSCLK_SOURCE_SYSPLL);
        DL_SYSCTL_setMCLKDivider(DL_SYSCTL_MCLK_DIVIDER_4);
    }
    Here the DL_SYSCTL_MCLK_DIVIDER_4 was required, since UART clock got tuned into 38400 baud rate. 
    Now the code is efficiently running with ADC and UBM  (UART break mode) are working properly.
    I am not sure at this point why changing MCLK is causing a issue.
    Regards,
    Bhushan
  • 0 in reply to Bhushan Khole
    TI__Expert 5440 points

    Hi Bhushan,

    Sorry for the delay, I'm out of office today and I'll respond to you tomorrow. Thanks.

    Best Regards,
    Peter

  • 0 in reply to Peter Jiang
    Prodigy 50 points

    To add further to this issue, there is a chance that I may have selected is invalid clock path.. I assume the light GREEN line is my current clock path. And the MCLK switching is YELLOW line.  

    Since I am using internal oscillator, (SYSOSC based), HFXT is not a option. 

    I would update more on bits MCLK2XVCO, USEHSCLK, HSCLKSEL status to give the exact path. 

  • 0 in reply to Bhushan Khole
    TI__Expert 5440 points

    Hi Bhushan,

    I'm glad you may have found the root of the problem. By the way, a simpler and recommended way to set the clock is to use the clock tree provided by our Sysconfig Tools, and also you can use Sysconfig to generate code and quickly compare your own code and troubleshoot the problem, hope it will be helpful to you.

    Best Regards,
    Peter