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MSPM0C1104: PWM shadow load function

Part Number: MSPM0C1104

Tool/software:

As shown in the chart, TIMA0 has the shadow function, but TIMG14 and TIMG8 do not. What is the difference?
I have seen examples from the SDK: timx_timer_mode_pwm_edge_sleep_shadow, and the duty value is updated when DL_TimerA_getPendingInterrupt(PWM_0_INST) is satisfied with the case DL_TIMERA_IIDX_CC0_DN.
If I want to use TIMG14 or TIMG8 to update the duty value, can I also use DL_TimerG_getPendingInterrupt(PWM_0_INST) and the case DL_TIMERG_IIDX_CC0_DN? If I cannot, are there other ways to achieve this?

  • The example from the SDK, timx_timer_mode_pwm_edge_sleep_shadow, works like this. If I want to use TIMG14 or TIMG8 to continuously update the duty value, what can I do?

  • You can use the same code. Without shadow registers, there is a race which could result in multiple compare matches in the cycle where the duty is updated. This will (I think) probably be invisible unless CDACT=3 (Toggle). 

    Switching the duty (CCx value) when a compare match has just happened (as above) is not a bad strategy to start with. 

  • Hi Rei,

    The example from the SDK, timx_timer_mode_pwm_edge_sleep_shadow, works like this.

    The method could still work. While you will have a range that not reliable when you want to update the duty.

    For example, the load value is 1000, and this is down counting up mode:

    At some moment, you set the CC value as 500, which represent 50% duty. And you are trying to update it to 10, which is 1% duty.

    But, when you trigger the interrupt and execute the code of updating the CC value, then the counter might already be increased to 15. At this moment, you will never trigger a CC event in this PWM cycle, so the PWD duty will be 100% or 0%.

    Switching the duty (CCx value) when a compare match has just happened (as above) is not a bad strategy to start with. 

    This will work.  Just similar situation, if you set the CC as 990 which is 99% duty cycle, then you will trigger the interrupt when counter is 990.

    If you want to set the CC as 10, which is 1% duty cycle, and find that when you trigger the interrupt and execute the code of updating the CC value, the counter might already be increased to 15, there also have the risk to lose the compare match even to make the PWM duty as 0% or 100%.

    -> Image the Extremization, change the 999 to 1 at up counting mode.

    So, you should reserve a safety range for the interrupt trigger,

    -> That related to you interrupt invoke and the CPU cycles you used before you update the CC value.

    and need set the Timer interrupt as the highest interrupt priority.

    B.R.

    Sal

  • Hello Bruce, Sal, kindly thank you for your detailed explanation.

    1. Now I can understand that the function of shadow registers is to avoid this situation: "If you want to set the CC as 10, which is 1% duty cycle, but the counter might already be increased to 15."

    2. Therefore, I will set a safety duty range of 10%~90%, and for the specification, I will also need to update the frequency in the interrupt. However, I think 10Hz~150Hz is also a safe range.

      So I can use the same code, and for the TIMG14 or TIMG8, when the case is DL_TIMERG_IIDX_CC0_DN, I will update both the duty and frequency. Is this correct?

  • In the manual, l got some useful information. So for the TIMG which shadow registers are not supported, l will set down-counting mode to TIMG.LOAD, and set "The value written to TIMx.CC register take effect immediately." to TIMG.CC

  • Hi Reim,

    So I can use the same code, and for the TIMG14 or TIMG8, when the case is DL_TIMERG_IIDX_CC0_DN, I will update both the duty and frequency. Is this correct?

    Yes, you could. Only need reserve a safety range and make it as the highest interrupt priority.

    So for the TIMG which shadow registers are not supported, l will set down-counting mode to TIMG.LOAD, and set "The value written to TIMx.CC register take effect immediately." to TIMG.CC

    tha is correct.

    B.R.

    Sal