Tool/software:
When using mibspi in master mode, not utilizing interrupts. After configuring and initiating the RX RAM transfer, I use while (rx_ram.RXEMPTY (flag bit 31) != 0)
to detect whether the reception is complete.While this approach works effectively in most cases, there are occasional instances where the RXEMPTY == 0 state persistently fails to be detected.
I have noted the entry MIBSPI#139 in the errata manual: "Mibspi RX RAM RXEMPTY bit does not get cleared after reading." However, the issue I am encountering appears to be related to the RXEMPTY flag not being set to 1 promptly. Additionally, no other transfer groups have been configured in my setup.