Tool/software:
I have yet to find a single TI written reference for what MSPM0 power should be in low power RUNNING mode, ie running from 32767Hz Xtal. Where can I find that data?
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Tool/software:
I have yet to find a single TI written reference for what MSPM0 power should be in low power RUNNING mode, ie running from 32767Hz Xtal. Where can I find that data?
Hi Chris,
We don't define this in the datasheet, but I can take a current test tomorrow if you want a 1 unit test. You can use the MHz/uA slope with the 4MHz statistic if you want a typical.
i tried that, see my other post on this topic. <<( thats a link, shows up as underlined in editor but not in normal reading pane) Best I can do in real test is 288 uA which seems very high. Please run test and let me know what the best is you can do.
Hi Chris,
I'm actually getting around the same on my board, 289uA. What's your use case for the application? Are you trying to limit the max current used or the average?
You will run less current executing from SRAM vs flash, but at the low frequency it may be minimal.
Regards,
Luke
Trying to limit the average. Needed a long pause to take a ADC sample. Was struggling to switch to standby and (1) hit the 2-3uA standby current while (2) maintaining the state needed to get a accurate ADC sample. I was able to get it working so no longer dependent on running a low power. That said I still want TI to spec "baseline/static IDD for run at 0 Hz" + "uA/MHZ" which it sounds like will be 288 uA for 32 KHZ.
Hi Chris,
The baseline spec is a bit tricky as you need some type of clock input for the CPU and the running mode current also depends on execution from the different types of memory. For example, we could spec an infinite while(1) loop inside our cache at 32kHz which would give you lower current, but is effectively useless for anyone actually using the device.
Typically for lower average current I tend to run fast and sleep long to limit the time different peripherals are powered.