Tool/software:
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Tool/software:
also page 95 states:
"The PD1 domain includes the CPU subsystem, the SRAM memory, PD1 peripherals, and the PD1 peripheral bus, which runs from MCLK (including the DMA) with a maximum frequency of 80 MHz. While PD1 is disabled in STOP and STANDBY mode, the CPU registers, SRAM, and peripheral MMR configuration registers are maintained in retention such that they are available to resume operation immediately when STOP or STANDBY modes are exited."
Hi,
I will run some test early next week. Could you please provide your test project here? Just for check why you called timer init function instead of timer start counter function. Based on the description, I would expect to call the start counter function there.
Best regards,
Cash Hao
while timer start might work I decided that if at least some register values had not survived standby1 not to trust in state of any registers and reinit all the counter registers.
Code is as shown above. Create project with free running up counters for TIMG12, TIMG0 and you should see that TIMG0 keeps counting during standby but TIMG12 counts before standby, it stops during standby (which is expected) but does not resume when return to run. add a watch on the counter regs to see it, step through the code. make sure you enable "allow enter low power " in debugger settings.
Hi,
I could not find the project. Could you attach your project in the post? Thanks!
Best regards,
Cash Hao
Hi,
It has been two weeks without news. Any more things need to help here?
Best regards,
Cash Hao