AM2634: MCAN ECC Config ISSUE

Hi,

I found the following thing in TRM:

Here i found that the default state of the ECC enable bits were logic-1, that means by default after reset ECC is already enabled.

And i also verified the source code of the SDL_ECC_init API, here i don't see they are anywhere enabling the ECC bits again, that means as the register bits default state is logic-1 (enabled by default) so due to this reason maybe they are not enabling again.

This is the reason the ECC worked in your case 2 and 3, because in these two cases either we are enabling or not altering the bits, so here ECC is in enabled state only. However, in your first case you are forcefully disabling the ECC and as i mentioned earlier the SDL_ECC_init API source code is not enabling ECC again, so this is the reason ECC is disabled, and it didn't work.

You can find the definition of the SDL_ECC_init in sdl_ecc.c source file:

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Thanks & regards,
Jagadish.

Hi,Jagadish!

I ran some validation tests。

① When I simulated, I read the value of the MCAN_ECC_CTRL register when I entered the main function. You can see from the figure below that it actually read 0. Does this mean MACAN ECC is turned off by default?

② I have tested the code of ECC configuration in SDL_ECC_Init, and it can be seen that the value of MCAN_ECC_CTRL is read in the code first. From the following figure, we can see that the value of val is 0, and then the bit0 bit1 bit2 of val is set to 1. Finally, write 0x07 to MCAN_ECC_CTRL.

Why doesn't what I'm testing match what you're saying? Is there a problem with the way I'm testing?

Hi,Jagadish!

Sorry, I made a mistake before, I should change the value of MCAN_ECC_VECTOR and then look at the value of MCAN_ECC_CTRL. After I do this, I find that the initial value of MCAN_ECC_CTRL after power-on is 0x187, which is consistent with what you said.

However, when configuring SDL ECC, it will re-enable ECC regardless of the value of MCAN_ECC_CTRL, as shown in the figure below, which sets bit0/1/2 to 1.

After the execution of SDL_ECC_Init, I manually set the Vector register value. As you CAN see from the following figure, the value read back by MCAN0_ECC_CTRL is 7, which indicates that SDL_ECC_Init enables the ECC function again.

However, my test found that although ECC was enabled, ECC fault was still triggered when I received CAN data. Why is this?

Thanks.

Hi,Jagadish!

According to Zhang Fan's suggestion, I re-sorted out the problem.

Next, I will divide this problem into two different situations, one is that mcal can disable ecc, the other is that mcal can enable ecc.

① Mcal Can Disable ecc

(1) After disable ecc in can_init, I manually wrote 0x148000 to the VECTOR register, and then read back the CTRL value is 0.

(2) After the sdl_ecc_init initialization is complete, I manually write 0x148000 to the VECTOR register again，and then read back the CTRL value is 7.

(3) After the initialization is complete, I send the CAN message through the host computer, and the ecc fault will be triggered. The intrSrc is 3

② MCAL Can Enbale ecc

(1)  After enable ecc in can_init, I manually wrote 0x148000 to the VECTOR register, and then read back the CTRL value is 7.

(2) After the sdl_ecc_init initialization is complete, I manually write 0x148000 to the VECTOR register again，and then read back the CTRL value is 7.

In this case, the software CAN run normally, and the CAN module can send and receive data normally.

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As can be seen from the above two cases, after the completion of sdl_ecc_init, the value of the MCAN_ECC_CTRL register I read back is the same as 7, but the phenomena displayed by them are different. Why?

Thanks.

Apologies for the delay, i am working on it again.

I will try to provide an update by tomorrow.

Hi,

Is it possible to setup one live debugging session for this issue, because i have some doubts to clarify with you.

The first doubt is that 

?? ? said:

(3) After the initialization is complete, I send the CAN message through the host computer, and the ecc fault will be triggered. The intrSrc is 3

Are you just calling the sdl_ecc_init initialization function? Are you not calling the ECC_sdlFuncTest? 

Actually ECC_sdlFuncTest should trigger the single bit and double bit ECC errors, i don't understand why sending the CAN packet from host to the board creating ECC faults.

I will be available from 10AM to 8PM IST (Indian Standard Time), you cane setup one debugging session based on your availability.

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Thanks & regards,
Jagadish.

Hi, Jagadish,

Thanks for your support.

Let me check the time with customer and setup the live debugging session.

Fan_Zhang said:

Let me check the time with customer and setup the live debugging session.

Thank you Fan Zhang!

Hi Fan Zhang,

I am still trying to reproduce this issue at my end but not succeeded yet.

Can you ask customer to provide a sample project for quick debugging from our end. Can you ask customer take one CAN example from SDK and ask him to include this SDL related code changes that he is using?

So that we can debug the issue and take the necessary actions. In mean time i will also try to do the same from my end.

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Thanks & regards,
Jagadish.

Unlocking this thread for Fan to respond.

Fan, Do you have any updates on this? Was the customer project shared?

Thanks and Regards,

Nikhil

Hi, Nikhil,

I have talked with customer on this issue today. He is busy on a urgent task, will tailor and share the project ASAP.

Thanks.

Thank you for the feedback Fan,

Will wait for customer response here.