Tool/software:
I didn't found an example linking interrupts to cores different of core 0. I tried using the code bellow over core 1, but the interrupt never happens.

I'm missing something?
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Tool/software:
I didn't found an example linking interrupts to cores different of core 0. I tried using the code bellow over core 1, but the interrupt never happens.

I'm missing something?
Hi Luiz
Apologies for the delayed response!
I tried to emulate the adc_soc_epwm example on R5FSS0_1 and am able to get the interrupts working properly. Please refer the attached example, and let me know if this solves your issue!
empty_am263px-cc_r5fss0-1_nortos_ti-arm-clang.zip
Regards
Akshit