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MSPM0G1107: Sharing the same pin for the MISO and GPI function

Akira Sugimoto
Prodigy 90 points
Part Number: MSPM0G1107
Other Parts Discussed in Thread: ADS114S08B,

Tool/software:

Hello,

I'm considering handling GPI (interrupt) via a pin shared with the MISO on the SPI bus. Actual use case is to read "Data Ready" signal from the ADC (ADS114S08B) via a bus shared with MISO.

Regarding MSPM0G1107/1507, are there any options to implement that? Is it the feasible way that changing the peripheral function at runtime, every sampling? Or (possibly), can read logic signals under SPI peripheral configuration with special backup resister or something like that?

Thanks.

  • 0
    Guru 99225 points

    Generally, you can't use the GPIO to read the state of a pin connected to the SPI, since the IOMUX PFs (Pin Functions) are separate.

    It is possible to switch the PF on the fly, by changing the PINCM register. In some cases this can produce glitches, but for your MISO pin this may not matter. (I suspect the SPI is idle while you're watching for Data Ready.)

  • 0 in reply to Bruce McKenney
    TI__Mastermind 18397 points

    Hi, 

    For this ADC's DRDY signal, please refer to the ADC's datasheet: 9.5.1.4 Serial Data Output and Data Ready (DOUT/DRDY)

    https://www.ti.com/lit/ds/symlink/ads114s08b.pdf

    This part describe the DRDY and DOUT pin's action.

    Need CS = Low to enable DRDY/DOUT's DRDY function.

    From MSPM0 side, M0 can do this part to communication with ADS using DRDY/DOUT.

    During SPI IDLE, to monitoring the DRDY/DOUT using a external interrupt GPIO function.

    Then switch the IO from GPIO to SPI using IOMUX.

    To read the ADS ready data.

    But we still recommend to use DOUT and DRDY separately, when MSPM0's GPIO is enough, this will take less software efforts.

    Regards,

    Helic

  • 0 in reply to Helic Chi
    Prodigy 90 points

    Hi Bruce and Helic,

    Thank you for your explanation.

    I understand that DRDY can be read by switching functions, but when CS is inactive, DRDY is unavailable (High-impedance state). Hence, can MSPM0 only detect DRDY signal in the case of polling? So does that mean that for handling interrupt (especially when using multiple ADCs), are independent DRDYs needed?

    Regards,

    Akira

  • 0 in reply to Akira Sugimoto
    TI__Mastermind 18397 points

    Hi, 

    Akira Sugimoto said:
    Hence, can MSPM0 only detect DRDY signal in the case of polling?

    Yes, but reading the IO continuously, this method is not recommended, as a SPI controller, there are also other tasks to run, GPIO interrupt is better.

    Akira Sugimoto said:
    So does that mean that for handling interrupt (especially when using multiple ADCs), are independent DRDYs needed?

    Yes, CS can not enable all ADS in single SPI bus.

    Regards,

    Helic

  • 0 in reply to Helic Chi
    Prodigy 90 points

    Hi Helic,

    Thank you very much for your reply. I will design based on your advice.

    Regards,
    Akira