AM2612: How to initialize PRU0 GPIO when link PRU_GPIO to GPIOx in syscfg.

Tool/software:

Dear TI experts,

I am working on code portage from AM2431 to AM2612. CPU is the only changed part and other peripherals are kept unchanged.

When I use PRU0_GPIOx linked with GPIOx to detect ADC output, I can't get expected result. ADC channel outputs are fixed status without affected by ADC input.

The same PRU code is working on AM2431. Compare the difference,  PRU_GPIx mux configuration is changed from PRU_GPOx to GPIOx.

On AM2431, PRU code is simple to read R31 register and get the ADC result. But on AM2612, I guess GPIO initialization on PRU or R5F is mandatory to be done.

I looked up in AM2612 SDK and document, there is no example about this. Could you please supply an example?

My environment is:

SDK: mcu_plus_sdk_am261x_10_00_01_10

Syscfg: sysconfig_1.23.0

ti-cgt-armllvm_4.0.1.LTS

ccs1281

PRU assembly code

OFFSET_RAM_DI_STATUS            .set    8

; CCS/makefile specific settings
    .retain     ; Required for building .out with assembly file
    .retainrefs ; Required for building .out with assembly file

    .global     main
    .sect       ".text"

    .asg        r1,       REG_TEMP_1
    .asg        r2.w0,    DATA_OLD
    .asg        r2.w2,    DATA_NEW

IFNE   .set  QBNE  ; if (REG1==OP(255))   then ... else branch to LABEL ( if (!(REG1!=OP(255)) )
IFEQ   .set  QBEQ  ; if (REG1!=OP(255))   then ... else branch to LABEL ( if (!(REG1==OP(255)) )
IFLT   .set  QBLE  ; if (REG1<OP(255))    then ... else branch to LABEL ( if (!(REG1>=OP(255)) )
IFLE   .set  QBLT  ; if (REG1<=OP(255))   then ... else branch to LABEL ( if (!(REG1>OP(255))  )
IFGT   .set  QBGE  ; if (REG1>OP(255))    then ... else branch to LABEL ( if (!(REG1<=OP(255)) )
IFGE   .set  QBGT  ; if (REG1>=OP(255))   then ... else branch to LABEL ( if (!(REG1<OP(255))  )
IFBS   .set  QBBC  ; if (REG1(OP(31))==1) then ... else branch to LABEL ( if (!(REG1(OP(31))==0)) )
IFBC   .set  QBBS  ; if (REG1(OP(31))==0) then ... else branch to LABEL ( if (!(REG1(OP(31))==1)) )

main:
;----------------------------------------------------------------------------
;   Clear the register space
;   Before begining with the application, make sure all the registers are set to 0.
;----------------------------------------------------------------------------
        ZERO    &r0, 120

;----------------------------------------------------------------------------
;   Constant Table Entries Configuration
;----------------------------------------------------------------------------

; PRU_ICSSG DRAM (local)      0000_0n00h, nnnn = c24_blk_index[3:0]  (not clear if 4 or 8bits are configurable)
        LDI     REG_TEMP_1, 0x0000                          ; c24 points to begin of DATA RAM
        SBCO    &REG_TEMP_1, c11, 0x20, 1 ; c11+0x20 => ICSSG_PRU_CTBIR0, bit7..0 => c24_blk_index;  (refman 6.4.14.1.6, 6.4.5.2.1)


;----------------------------------------------------------------------------
;   SECTION: IDLE
;   PRU enters the program, executes intialization and then stays in this
;   section until any further command from r5f
;----------------------------------------------------------------------------
idle:
;        WBS    r31, 31 ; wait until host irq 1 is set
;        LDI    REG_TEMP_1, 22
;        SBCO   &REG_TEMP_1, c0, 0x24, 4 ; clear host interrupt (write interrupt in ICSS_INTC_STATUS_CLR_INDEX_REG)

getdata:
        mov    DATA_NEW, r31.w0 ; Read bit0~15 from r31 register to get value of all PRU pins and store into r2.

        SBCO   &DATA_NEW, c24, OFFSET_RAM_DI_STATUS, 2 ; memcpy(c24+offset, &DATA_NEW, 2bytes)
;        WBC    r31, 30 ; check if host irq 0 is clear, generate irq 16 to host for inform new data.
;        LDI    r31.b0, (0x20 + 0) ; set bit5 of R31 to generate interrupt 16 to host.
        JMP    idle

Best Regards,