PWM - independent edge control

Hello Peter,

I would be glad to help you.

When you say "control both edges" are you talking about  when the edges fall? i.e. the duty cycle?

You can configure the point in the period when you want the PWM to be high and when you want it to be low. Is this the behavior you are looking for? If not give me more details and i'll help you out.

Also, the PWM section in the datasheet should have all the details you are looking for.

Regards,

Alex

Hello Alex,

Thanks for help.

> you talking about  when the edges fall? i.e. the duty cycle?

The duty cycle of one channel has its rising edge and falling. I need to control the position of these edges to place them asymetricaly during PWM period.

 > You can configure the point in the period when you want the PWM to be high and when you want it to be low. 

Yes, during the same PWM period I want to control rising edge of duty cycle and falling edge.

Best regards,

Peter

To be more clear:

I have an induction machine of high power, the motor is fed by high voltage three phase inverter of standard topology it means that inverter has three legs and six transistors.

I need to adjust my PWM modulation of inverter to improve motor current THD. Still the modulation is in complementary mode with dead-time insertion. It means the top transistor is switch on and the bottom transistor is switched off within the same inverter leg. I  want to keep this inevrter behavior. However I need to adjust the placement of duty cycle for the top transistor but its bottom counterpart is still in complementary mode (top=on, bottom=off, plus dead-time insertion). I want to control the rising edge of top transistor and its falling edge as well. Everything is concern of the same inverter leg. I do not want just to instruct the microprocessor about duty-cycle but I need to set rising and falling edge but still have complementary mode with dead-time insertion.

Let's say I have center aligned modulation with modulo set to 1500-counts. First half equals 750-counts during up-counting of PWM generator and second half equals 750-counts during down-counting of PWM generator. So I want to achieve 50% duty-cycle:

1) Center aligned duty-cycle of top transistor means that the rising edge is at 375 (compare during up-counting) and falling edge at 1125 (compare during down-counting). Assume it as standard modulation.

2) Modified modulation of top transistor duty-cycle means that the rising edge is at 275 (compare during up-counting) and falling edge at 1025 (compare during down-counting). As result I still achieve 50% duty-cycle but its placement within PWM period is slightly shifted.  (this is just example.)

I am thinking of using Stellaris uP since I need to do more tasks e.g. display control, safety routines, external USB flash, etc... but still to have the advanced motor control functionality on the chip. I hope the Stellaris would be right choice.

I hope it is more clear now :)

Best regards,

Peter

Peter,

Thanks for the details.

We have all the capability that you mentioned - and Stellaris is a good choice if you do wish to add additional tasks like the one's you described.

One note - our driver library that we wrote for our customers uses a set of APIs to configure and control all of our peripherals - by default left justifies all the PWM pulses, but the capability to do what you want is there. I just wanted you to be aware of that.

Here are our kits that may be of interest to you:

http://www.ti.com/lsds/ti/microcontroller/arm_stellaris/kits_modules.page

These are all plug and play kits so you can evaluate the TI Stellaris parts quickly.

Let me know if you have any other questions,

Alex

Hello Alex,

thanks a lot for your feedback!

Do you have any brief example on this topic or you can point where this feature is mentioned in datasheet? 

Best regards,

Peter

Peter,

If you go here:

http://www.ti.com/lit/gpn/lm4f232h5qd

and take a look at the "20. Pulse Width Modulator (PWM)" section, you will see all the details about the PWM.

Specifically, take a look at "20.3.3 PWM Signal Generator".

Regards,

Alex

It seems that it is possible only with sw ISR intervention since you have 2x comps (compA and compB). I assume that I can call ISR in middle of counting and reprogram value compA and compB. But does on-chip PWM support behavior without sw ISR?

I assume you need 4x comps (compAup, compAdown, compBdown, compBup) or if I need complementary output I can control up edge with compA and down edge with compB. Am I correct in my thinking?

Best regards,

Peter

Peter,

Peter Balazovic said:

It seems that it is possible only with sw ISR intervention since you have 2x comps (compA and compB). I assume that I can call ISR in middle of counting and reprogram value compA and compB. But does on-chip PWM support behavior without sw ISR?

Are you talking about changing the match values?

Peter Balazovic said:

I assume you need 4x comps (compAup, compAdown, compBdown, compBup) or if I need complementary output I can control up edge with compA and down edge with compB. Am I correct in my thinking?

I'm not sure what you're asking here. When a comparator event occurs you can ignore the event (do nothing), it can be toggle the signal, drive it Low, or drive it High. For complimentary output you would set one High when one goes Low and vica versa.

Regards,

Alex

Are you talking about changing the match values?

Yes I am talking about match values.

What I am actually looking for is asymmetrical PWM with posibility to control rising edge and falling edge without ISR intervation. I want to have just regular update and instruct PWM modulator to compare it asymmetrically. So rising edge is different value and falling is different value. Top signal is complementary to bottom signal with dead-time insertion.

Best regards,

Peter 

The Tempest class parts have a global synchronization bit so the update can take place outside of any ISR and all channels update synchronously.  You would first determine the rising edge and falling edge points, update the registers for compA and compB and then trigger a synchronization.  Once a synchronization is triggered, the updates to the PWM registers would take effect the next time the counter reaches zero.