Other Parts Discussed in Thread: TMS570LS20216, NOWECC
Hi,
I am trying to simulate a 1-bit ECC error in the flash memory of a TMS570LS20216 board but I am not succeeding; I am using IAR 6.30 to create the object file (pseudoACBappCode.out) which is compiled from C++ as part of smxRTOS. Then I use nowECC v2.17 with the following line:
>nowecc -i pseudoACBappCode.out -o pseudoACBappCode_ECC.out -r4 -f035 -s1 0x90000 2
so that I can create a 1-bit error at bit 2 of the data word located at address 0x90000.
With these two available object files, I use nowFlash v3.41 (along with an XDS100v2 emulator) to program both pseudoACBappCode.out and pseudoACBappCode_ECC.out. This pseudo application code resides in Bank 1 of the flash, and fills the first sector (it resides in the address range 0x80000-0x9FFFF), and so its ECC code is programmed in its corresponding address range (0x440000-0x44FFFF).
My pseudo application code is meant to enable the ECC checking in Flash (EDACEN = 0xA), and in the CPU (which is explained in the TRM, document spnu489c, section 8.5.3.3 ). Then it enables the interrupt by setting EZFEN (bit 9) of the FEDACCTRL1 register. After this code setup, I make a pointer that reads address 0x90000 in an infinite loop, which should in theory kickstart an interrupt that increments a counter, and, after every time I read the misbehaving address, I send the interrupt counter serially so that I can read it in TeraTerm. I am doing this test because I read in section 8.5.3.9 of the TRM, that in JTAG debug mode, the interrupt won't be generated if a correctable error is encountered, and I would like to implement an interrupt that updates information if a 1-bit error occurs.
While I am receiving data serially, i.e. I get the counter value, I see that the counter does not get incremented and it always remains at 0.
So, am I meant to use nowFlash and nowECC differently? How am I meant to simulate a 1-bit ECC error on this board?
Any help would be appreciated,
-Juan Martinez
