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AM2432: Inverse Clock Polarity Features for BISSC

Kevin Peng
Expert 3762 points
Part Number: AM2432

Tool/software:

Hi TI Experts,

Customer is working on AM2432 SDK9.2.

Customer cannot find much documentation describing how to inverse the clock of BISSC. We have tried to look for it but cannot find the API (not like SDFM which has an obvious API). 

Customer needs our support to inverse the clock polarity of BISSC, could you provide some guidance for customer to try?

Thanks,

Kevin

  • 0
    Prodigy 220 points

    To make it clear - I'm referring to the MA clock and not the ICSSG clock

  • 0
    TI__Intellectual 2650 points
    Kevin Peng said:
    Customer cannot find much documentation describing how to inverse the clock of BISSC. We have tried to look for it but cannot find the API (not like SDFM which has an obvious API). 

    Hi Kevin,

    The PRU ICSS 3-channel peripheral does not support clock inversion, so they have to use other options like external convertor or another peripheral which can generate inverted clock.

    Thanks & regards,

    Achala Ram

  • 0 in reply to Achala Ram
    Prodigy 20 points

    Dear Ram.
    We need to solve the issue for machines which are ready to be shipped to end customer.
    We cannot change anything in the machines. It's not in our hands.
    Please support to provide a FW solution.
    Thanks

  • 0 in reply to Tzur Gazit
    TI__Mastermind 27764 points

    Hi

    What is the purpose for this inversion? Is this needed as per BiSS-C specification?

    We support control communication already which needs high or low clock line state after the command. 

    Regards

    Dhaval

  • 0 in reply to Dhaval Khandla
    Prodigy 220 points

    One of our customer has reported an issue of jerks/jumps in the output velocity/velocity command the drive generates.

    To my understanding, the customer tried (with no guidance from our side) to reverse the clock by switching the wiring.

    He reported the issues he observed have been resolved by doing so.

    We wonder if by doing so it will resolve it will resolve also some other issues we experience with the BiSSC module so we want to understand if inverting the clock (MA) from the FW is possible.

  • 0 in reply to Ariel Ronen
    TI__Mastermind 27764 points

    Ariel

    Ariel Ronen said:

    One of our customer has reported an issue of jerks/jumps in the output velocity/velocity command the drive generates.

    Can you share more details here? What do you mean by jerks/jumps here? Can you share some logic analyzer/scope capture explaining the issue?

    Also, can you help us further by sharing a diagram of the waveform requirement (with MAI and SLO lines) with inverted clock? This will help us in understanding the issue.

    Thanks and Regards

    Dhaval

  • 0 in reply to Dhaval Khandla
    TI__Mastermind 47541 points

    (1) You can try shifting the clock via ED_TST_DELAY_COUNTER0, 16-bit counter, allow delaying the clock start. Configured in ICSSG_CORE CLK units. But this may not help with clock/data timing adjustment.

    (2) Other option is to manually generate the clock using say a free PRU. Set ED_CLK_OUT_OVR_EN0 and directly control CLK pin using ED_SW_CLK_OUT0