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LP-AM243: lp-am243

Baruch Einziger
Intellectual 380 points
Part Number: LP-AM243
Other Parts Discussed in Thread: SYSCONFIG, AM2434

Tool/software:

Hi All,

Could someone please clarify why my non-cacheable shared memory, declared via SysConfig and recognized by the linker for cores r00 and r01, appears differently from the perspective of core r01 when constructing a message for core r00?

Specifically, I'm noticing discrepancies in memory values when switching between cores in the DEBUG screen. I've attached two screenshots demonstrating this issue for reference.

I'd appreciate any insights into why this might be happening and suggestions on how to resolve it.

Thanks, Baruch

 

  • 0
    Intellectual 380 points

    Hi all,

    I’ve identified the root cause of the issue where the same memory segment appeared differently between two cores. The problem was that Core R01 on the AM2434 was running with cache enabled, even though I had declared the region as non-cacheable in SysConfig.

    To resolve it, I disabled the cache on R01 before writing to the shared memory region. After that, both cores viewed the shared memory consistently.

    I’m still looking for a better solution that ensures all cores access the shared memory region as truly non-cacheable.

    Thanks,
    Baruch

  • +1 in reply to Baruch Einziger
    Intellectual 380 points

    Hi all,

    I added another region with a shared non-cacheable segment for all the cores I’m using, and that resolved the issue I was facing.

    However, I’m still concerned because there are now two overlapping declarations for the same memory zone:

    • One covers the entire internal RAM at address 0x70000000 with a size of 2MB.

    • The other defines a 256KB region at the beginning of the same internal RAM.

    I tried to avoid this overlap by starting the internal RAM segment at address 0x70800000, but in that case, the core got stuck during the initial startup and didn’t reach the main() function.

    Best regards,
    Baruch