• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 33 subscribers
  • Views 230 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS570LC4357: Please confirm Ethernet PHY function in microcontroller reject with the incorrect CRC.

Nagabhushanabhat K
Prodigy 120 points

Part Number: TMS570LC4357

Tool/software:

Please confirm below statements are applicable for TMS570LC4357:

Please confirm FCS( (also known as the Cyclic Redundancy Check or CRC)) calculated in microcontroller at hardware level

Please confirm Ethernet PHY function in microcontroller reject with the incorrect FCS (also known as the Cyclic Redundancy Check or CRC).

  • 0
    TI__Expert 6100 points

    Yes, the FCS is calculated at the hardware level.  A CRC error will cause an interrupt and the CRCERROR flag will be set.  This register has information.

    Page 1826 of TRM:

    32.2.6.5.20 CRC Error (CRCERROR) Flag This flag is set by the EMAC in the SOP buffer descriptor, if the received packet contained a CRC error and was not discarded because the RXCEFEN bit was set in the RXMBPENABLE.

    Page 1919 of TRM

    32.5.50.5 Receive CRC Errors Register (RXCRCERRORS) (offset = 210h) The total number of frames received on the EMAC that experienced a CRC error. A frame with CRC errors is defined as having all of the following: • Was any data or MAC control frame that matched a unicast, broadcast, or multicast address, or matched due to promiscuous mode • Was of length 64 to RXMAXLEN bytes inclusive • Had no alignment or code error • Had a CRC error. A CRC error is defined as having all of the following: – A frame containing an even number of nibbles – Fails the frame check sequence test