MSPM0L1227-Q1: MSPM0L1227-Q1 SPI interfacing with TLIN1431

Halappa Hajare

Part Number: MSPM0L1227-Q1
Other Parts Discussed in Thread: MSPM0L1227

Tool/software:

Dear team,

to meet the ASIL requirements of our project, we need to enable the CRC feature in the TLIN1431, which is configured to communicate with the MSPM0L1227 in SPI mode.

The MSPM0L series datasheet indicates a programmable data frame size ranging from 4 to 16 bits in controller mode. However, enabling the CRC feature in the TLIN1431 results in a 24-bit SPI frame size.

Could you please provide some hints, if there is method available to handle this requirement?

Best regards,

Halappa

6 months ago

+1 Bruce McKenney 6 months ago

Guru 100555 points

You can do this as 3x8-bit frames. Just deconstruct/reconstruct the 16-bit part from the 8-bit fragments (watch out for byte-order).

In this case, you probably shouldn't use the built-in Chip Selects, rather manage the nCS as a GPIO.

0 Luke Ledbetter 6 months ago in reply to Bruce McKenney

TI__Mastermind 26280 points

Along with Bruce's suggestion, I find it useful to use the DMA for larger SPI packet sizes which are greater than the SPI peripherals frame size.

0 Halappa Hajare 5 months ago in reply to Bruce McKenney

Prodigy 30 points

Hello Bruce,

Thanks you for inputs. It worked after implementing as you suggested above.

Cheers!

Halappa

0 Halappa Hajare 5 months ago in reply to Luke Ledbetter

Prodigy 30 points

Hello Luke,

Thanks for hint. Yes I have to consider implementing using DMA in next step to optimize.

Best regards,

Halappa

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MSPM0L1227-Q1: MSPM0L1227-Q1 SPI interfacing with TLIN1431