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MCU-PLUS-SDK-AM243X: Core-1 init fails at Sciclient_init()

Eli Mordel
Expert 1385 points
Part Number: MCU-PLUS-SDK-AM243X
Other Parts Discussed in Thread: TMDS243EVM, AM2434, AM2432

Tool/software:

Hi,

I manage to run app on core-0.

I'm trying to bringup the second core on the TMDS243EVM but fail on System_init(.. inside Sciclient_init(..

I'm using ind_comms_sdk_am243x_09_01_00_03\mcu_plus_sdk.

I see that ti_drivers_config.c for both cores have CSL_CORE_ID_R5FSS0_0 as a core-ID. 

void System_init(void)
{
/* DPL init sets up address transalation unit, on some CPUs this is needed
* to access SCICLIENT services, hence this needs to happen first
*/
Dpl_init();
/* We should do sciclient init before we enable power and clock to the peripherals */
/* SCICLIENT init */
{
int32_t retVal = SystemP_SUCCESS;

retVal = Sciclient_init(CSL_CORE_ID_R5FSS0_0);

...

}

Should I set my core-ID somewhere (maybe at syscfg ?) so that the generated code will match the core-ID ?

I've changed with the debugger but still crash to   __data_abort_handler.

Please advice,

Thanks,

Eli

  • 0
    TI__Guru 53678 points

    Hi Eli,

    Which method of EVM initialization are you using? Are you using SBL or SPL?

    Which boot mode are you using?

    Regards,

    Tushar

  • 0 in reply to Tushar Thakur
    Expert 1385 points

    Hi Tushar,

    I'm using the SBL.

    Before I load the app for core-0 and core-1 I put uart boot mode then run the default null cfg then get 

    Starting NULL Bootloader ...

    DMSC Firmware Version 9.1.6--v09.01.06 (Kool Koala)
    DMSC Firmware revision 0x9
    DMSC ABI revision 3.1

    INFO: Bootloader_runCpu:155: CPU r5f1-0 is initialized to 800000000 Hz !!!
    INFO: Bootloader_runCpu:155: CPU r5f1-1 is initialized to 800000000 Hz !!!
    INFO: Bootloader_runCpu:155: CPU m4f0-0 is initialized to 400000000 Hz !!!
    INFO: Bootloader_loadSelfCpu:207: CPU r5f0-0 is initialized to 800000000 Hz !!!
    INFO: Bootloader_loadSelfCpu:207: CPU r5f0-1 is initialized to 800000000 Hz !!!
    INFO: Bootloader_runSelfCpu:217: All done, reseting self ...

    Then I attach to core-0 and run core-0-app 

    then same for core-1 then I crash.

    Thanks,

    Regards,

    Eli

  • 0 in reply to Eli Mordel
    Expert 1385 points

    Hi Tushar,

    I'm looking at linker.cmd for core-1.

    I found out that  when:

    I place the priveleged functions in TCMA1 - it crashes.

    I place the priveleged functions in MSRAM - it works !

    MEMORY
    {
    R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040
    R5F_TCMA1 : ORIGIN = 0x41000040 , LENGTH = 0x00007FC0 /*code ATCM for core-1 */

    R5F_TCMB1 : ORIGIN = 0x41010000 , LENGTH = 0x00008000 /*data BTCM for core-1 */

    MSRAM : ORIGIN = 0x70080000 , LENGTH = 0x15C000 /* 1,425408B ytes */

    DDR : ORIGIN = 0x98000000, LENGTH = 0x08000000 /* 128MB */

    USER_SHM_MEM : ORIGIN = 0x701DC000, LENGTH = 0x4000 /* 16KB Shared Memory at 

    }

    privileged_functions : ALIGN(8)
    {

    _s_privileged_functions = .; /* Start address of the .freertos_data section */

    *tasks.obj(.text*)
    *port.obj(.text*)
    *queue.obj(.text*)
    *list.obj(.text*)
    *timers.obj(.text*)

    *(privileged_functions)
    _e_privileged_functionsb = .; /* End address of the .freertos_data section */
    } > R5F_TCMA1

    I'm struggeling to undestand what is exactely the TCM layout for am2434 and what should I use for core-1 ?

    What is te difference between  am2432 (which works fine ) and the am2434 ?

    Please explain.

    Thanks,

    Regards,

    Eli 

  • 0 in reply to Eli Mordel
    TI__Guru 53678 points

    Hi Eli,

    When the application crash, which line of the code CPU executes? Can you try halting the CPU and check which instruction it is currently executing during crash?

    Eli Mordel said:
    What is te difference between  am2432 (which works fine ) and the am2434 ?

    Please refer Table 4-1. Device Comparison of the device datasheet to know the difference between device variants.

    Regards,

    Tushar

  • 0 in reply to Tushar Thakur
    Expert 1385 points

    Hi Tushar,

    I found the reason for the crash - I was trying to accees the TCMA with an adress which is not 0x00 - but it seems to be  MPU protected area in the TCM.

    In overall I dont't fully understand the TCM adresses in general and particulary not when shared between cores. 

    The most confusing part is that the IVT is the same 0x00 -0x40 for all cores but the TCMB adresses are not the same. 

    Is there an article with a precise explanation ?

    Thanks,

    Regards,

    Eli

  • 0 in reply to Eli Mordel
    TI__Guru 53678 points

    Hi Eli,

    Eli Mordel said:
    Is there an article with a precise explanation ?

    The TCM memory for R5FSS uses the local address 0x0 for access. Please refer section 6.2.3.2.2 Tightly-Coupled Memories (TCMs) for details.

    The initial base address of ATCM is 0x0000_0000 and the initial address of BTCM is 20’h41010 for R5F local view.

    Regards,

    Tushar

  • 0 in reply to Tushar Thakur
    Expert 1385 points

    Hi Tushar,

    ("Please refer section 6.2.3.2.2")   Wich document are you refering to ? 

    Can you please send me a link to it ?

    Thanks,

    Regards,

    Eli

  • 0 in reply to Eli Mordel
    TI__Guru 53678 points

    Hi Eli,

    Please refer AM243x TRM for details.

    Regards,

    Tushar

  • 0 in reply to Tushar Thakur
    Expert 1385 points

    Hi Tushar,

    Thanks,

    Regards,

    Eli