TM4C1294KCPDT: compiled and linked but when loaded on board have some problems

daniele banfi

Prodigy 180 points

Part Number: TM4C1294KCPDT
Other Parts Discussed in Thread: EK-TM4C1294XL

Tool/software:

Dear All

I've write a easy main.c s follow:

int main(void)
{
// set ports
PortFunctionInit();

return 0;
}

During linking project I 've these warning:

<Linking>
warning #10247-D: creating output section ".text" without a SECTIONS specification
warning #10247-D: creating output section ".const" without a SECTIONS specification
warning #10247-D: creating output section ".cinit" without a SECTIONS specification
warning #10247-D: creating output section ".vtable" without a SECTIONS specification
warning #10247-D: creating output section ".stack" without a SECTIONS specification
Finished building target: "test-arm.out"

Building secondary target: "test-arm.hex"
Invoking: Arm Hex Utility
"C:/ti/ccs1281/ccs/tools/compiler/ti-cgt-arm_20.2.7.LTS/bin/armhex" --diag_wrap=off -o "test-arm.hex" "test-arm.out"
Translating to Extended Tektronix format...
   "test-arm.out" .text ==> .text
   "test-arm.out" .const ==> .const
   "test-arm.out" .cinit ==> .cinit
Finished building secondary target: "test-arm.hex"

warning: Data is being written to auto-generated file test-arm.x1
warning: Data is being written to auto-generated file test-arm.x2
warning: Data is being written to auto-generated file test-arm.x3

Then the binary is loaded with JTAG interface (XSD200) and firmware start immediatly and stop on this call:

CORTEX_M4_0: GEL Output:
Memory Map Initialization Complete
CORTEX_M4_0: Can't Run Target CPU: (Error -1268 @ 0x1090001) Device is locked up in Hard Fault or in NMI. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 20.0.0.3178)

So, memory map seems OK and loaded (is my board , not Kit), but software lock on this function:

__attribute__((section(".text:_c_int00_noargs"), used, naked))
void _c_int00_noargs(void)
{
_c_int00_template(0, 1);
}

Questions:

1) is not set memory allocation ?

2) May be a watchdog enable on startup ?

3) Of course, where I wrong ?

Any suggest is apreceid

Regards, Daniele

4 months ago

0 Charles Tsai 4 months ago

TI__Guru**** 191736 points

Hi,

I think you have a linker problem. The linker file defines where each SECTION is mapped to which MEMORY on the device. Below is a typical snippet of a linker file for TM4C129 MCU. As I mentioned to you in the other post, I strongly suggest you start with an example like the hello project or the project0. You can find these examples at C:\ti\TivaWare_C_Series-2.2.0.295\examples\boards\ek-tm4c1294xl\hello and C:\ti\TivaWare_C_Series-2.2.0.295\examples\boards\ek-tm4c1294xl\project0. There are many other examples you can play with and use as reference. Build these projects and load them to the flash and have a feel for how they work. Once you have them working, you can replace the source file with your own code. Using these example projects guarantee that you have the proper CCS settings.

--retain=g_pfnVectors

/* The following command line options are set as part of the CCS project.    */
/* If you are building using the command line, or for some reason want to    */
/* define them here, you can uncomment and modify these lines as needed.     */
/* If you are using CCS for building, it is probably better to make any such */
/* modifications in your CCS project and leave this file alone.              */
/*                                                                           */
/* --heap_size=0                                                             */
/* --stack_size=256                                                          */
/* --library=rtsv7M3_T_le_eabi.lib                                           */

/* The starting address of the application.  Normally the interrupt vectors  */
/* must be located at the beginning of the application.                      */
#define APP_BASE 0x00000000
#define RAM_BASE 0x20000000

/* System memory map */

MEMORY
{
    /* Application stored in and executes from internal flash */
    FLASH (RX) : origin = APP_BASE, length = 0x00100000
    /* Application uses internal RAM for data */
    SRAM (RWX) : origin = 0x20000000, length = 0x00040000
}

/* Section allocation in memory */

SECTIONS
{
    .intvecs:   > APP_BASE
    .text   :   > FLASH
    .const  :   > FLASH
    .cinit  :   > FLASH
    .pinit  :   > FLASH
    .init_array : > FLASH

    .vtable :   > RAM_BASE
    .data   :   > SRAM
    .bss    :   > SRAM
    .sysmem :   > SRAM
    .stack  :   > SRAM
#ifdef  __TI_COMPILER_VERSION__
#if     __TI_COMPILER_VERSION__ >= 15009000
    .TI.ramfunc : {} load=FLASH, run=SRAM, table(BINIT)
#endif
#endif
}

__STACK_TOP = __stack + 512;

0 daniele banfi 4 months ago in reply to Charles Tsai

Prodigy 180 points

Dear Charles

In effect I've not see in my design MEMORY/SECTIONS parts

I do as you suggest

Thanks again fro your fast support

Daniele

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TM4C1294KCPDT: compiled and linked but when loaded on board have some problems