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Original question:

LP-AM243: Controlling system UARTs with a PRU core

LP-AM243: PRU Shared Memory Issues

Brian Viola
Prodigy 60 points

Part Number: LP-AM243

Tool/software:

My project uses two R5 cores (0_0 & 1_0) with IPC between cores and GPIO for LD1 & LD2. I've also widened the shared memory for the R5 cores to allow for larger buffer transfers b/w the two via an IPC provided pointer to shared memory.

I've recently merged in a coworkers PRU project which works correctly in this workspace but not in mine. I believe I've tracked down the issue to the C28 register not being initialized correctly to 0x10000, or possibly being overwritten to 0. I believe the latter is improbable because I believe that register is read-only.


Below is the PRU linker file for PRU0 (PRU1 has the same initialization) and it seems to be correct.

Comparing the LinkerInfo.XML files of the working and non-working builds they look to be the same

I've also tried using PRUICSS_setConstantTblEntry() w/out success the register is still 0x0.

  


Questions:

1) Ideas on what the issue might be causing the C28 register to be 0? 

2) How can I debug the initialization and any change to the C28 register? 

Thanks in advance for your help. This is my first time dealing w/ the PRU. 

Brian

  • +1
    TI__Guru 50611 points

    C28 is by default configured to 0. But C28, C29, C30 and C31 allows you to configure Bits [23-8] to application/user defined value. Most of the TI software is initializing this from application to repurpose it to access SMEM (Shared memory)