AM2434: Resource contention around CBASS

Ricardo Bedin Franca

Part Number: AM2434

Tool/software:

Hello,

I am studying possible sources of multi-core timing interference in AM243x devices and I wanted to understand how CBASS works. Section 3 of the AM64x/AM243x reference manual (SPRUIM2H) states that "This mutli-layered crossbar network supports multiple in-flight transactions to improve both latency and throughput" and section 3.6 states that "If the transactions going to the same end point have the same priority, then the CBASS uses round robin method for these transactions".

Does this mean that the CBASS can support any number of simultaneous transactions between initiator and target if the initiators are requesting access to different targets?

Thanks,

Ricardo

8 months ago

0 PaulM 8 months ago

TI__Mastermind 29025 points

Ricardo

I will look at this and get back to you shortly.

--Paul

0 JJD 8 months ago in reply to PaulM

TI__Guru* 90145 points

Hi Ricardo,

yes, CBASS would be able to handle multiple requests from multiple initiators, and arbitrate the transactions between them to their destinations. It would support simultaneous in-flight transactions, and when necessary, it would stall or hold off transactions for arbitration reasons or when other downstream targets are busy.

Regards,

James

0 Ricardo Bedin Franca 8 months ago in reply to JJD

Prodigy 90 points

Hi James,

In a use case where I have two cores accessing only their respective TCM banks and separate OCSRAM banks, would there be any timing interference between cores?

Thanks,

Ricardo

0 PaulM 8 months ago in reply to Ricardo Bedin Franca

TI__Mastermind 29025 points

Local memories are dedicated to the cores.

--Paul

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AM2434: Resource contention around CBASS