MSPM0G3519: Discrepancy Between MSPM0 TRM Registers and Example Code

Jishnu P

Part Number: MSPM0G3519

Tool/software:

Hello team,

I’m working with the MSPM0G3519 and referring to the Technical Reference Manual (TRM) for implementation. I’ve come across certain registers that are documented in the TRM but are not referenced or used in the provided example code or header files (CMSIS/driverlib).

For example, the PICO register in the SPI peripheral section is described in the TRM, but I couldn’t find any reference to it in the device headers or TI-provided examples.

Could you please clarify are these registers are accessible and supported in the current silicon and SDK?

Thank you,
Jishnu

5 months ago

0 Luke Ledbetter 5 months ago

TI__Mastermind 26170 points

Hi Jishnu,

Please follow the registers in the example code, the table should begin at the PWREN bit (offset 0x800).

0 Jishnu P 5 months ago in reply to Luke Ledbetter

Prodigy 25 points

Hi Luke,

If you referring to the PWREN in the SPI_GPRCM_Regs structure, I had already found it.

I need help in finding the HIGHZ0 bit present in the CS1_POCI1 register, which is present in the TRM (the below pic).

0 Luke Ledbetter 4 months ago in reply to Jishnu P

TI__Mastermind 26170 points

Hi Jinhnu,

Those registers are not present on this device. You can cause the high-z scenario by setting the high-z bit in the IOMUX, but it is a high-z for output high.

Arm-based microcontrollers

Arm-based microcontrollers forum

MSPM0G3519: Discrepancy Between MSPM0 TRM Registers and Example Code