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LM4F I2C High-Speed Mode and ETM Availability on 64-Pin Devices

Jesse Griggs
Prodigy 240 points

Just out of curiosity and for general forum knowledge I have two questions regarding the new I2C peripheral and ETM instruction trace availability in the new LM4F 64-pin devices (i.e. LM4F231E5QR). 

When reviewing the Differences Among Stellaris Product Classes (Rev. A), specifically in the I2C section (pg. 16), there is mention of a high-speed mode (Fast-mode plus 1Mbps?) in the Blizzard (LM4F) devices but I can't find any reference to such a mode in the Stellaris LM4F231E5QR Microcontroller Data Sheet.  Is this high-speed mode actually present in the LM4F devices but the I2C peripheral documentation has not been updated to reflect such a mode?

Will the 64-pin LM4F devices support the ETM instruction trace port?  It appears that 3 of the 4 trace data lines (TRD0, TRD1, and TRD2) as well as trace clock (TRCLK) are allocated in signal tables (pg. 1308) of Stellaris LM4F231E5QR Microcontroller Data Sheet but trace data line 4 (TRD3) appears to be missing.  Is this simply a data sheet omission or is ETM not supported on the 64-pin devices?


Thanks,

Jesse Griggs

  • 0
    Guru 47900 points

    Believe that PF4 provides trace data line 4.  (am remote - but not mobile - away from normal data)   This data from TI - I had discovered/asked same question months back.  Can't help you on I2C issue yet - have boards being built - ETA mid next week.

  • 0
    TI__Expert 3950 points

    Jesse,

    Updated LM4F datasheets are currently being staged for release in the next few days, but the answers to your questions are below.

    - The new datasheets will have Fast-Mode Plus (1 Mbps) included

    - 64 pin versions of LM4F only support TRD0 & TRD1, which is an additional datasheet update required and may not actually be included in the next version

    JF

  • 0 in reply to Joe Folkens
    Guru 47900 points

    Ouch - again this is far different than what TI MCU specialist reported to our firm - in writing - months ago.  (re 64 pin, M4F MCU)  We reacted to "only 3" Trace data lines listed w/in datasheet - strongly doubted that was correct - were told that 4 data lines were present!  Two trace data bits seems barely adequate - as this represents a large shift from what we were told earlier - may we ask if you are "quite sure" of this significant change?   (only 2 trace data bits - not 4 - on new, 64 pin M4F)

    Must now ask - will the newer data sheets clearly list multiple such, "significant changes - between past M4F datasheet to current (i.e. this pending, new one?)  Of course this would be much more valuable if it listed/included all known "changes" - not just I2C and Trace info...  Alternative to clear listing of changes requires that TI clients "comb" all 1400+ M4F pages (i.e. read the "very long", fine manual) - searching for changes.  Not fun/efficient for clients - really hope TI can shield us!  (simple listing of datasheet "functional changes" would solve...)

    "Staged for release," (yay - corp speak) seems to hedge against, "release in next few days."    Would be most helpful if these new, updated, 64 pin M4F  datasheets landed on the TI web-site sooner rather than later...   

     

  • 0 in reply to cb1
    TI__Expert 3950 points

    Please note that the next 64-pin QFP datasheet revision that will include the TRD updates/corrections are scheduled to be published by mid-March. I apologize for the delay.

    JF