[FAQ] TMS570LC4357: EMIF concept of BA[0] and BA[1] in 8 and 16 bit asynchronous device

Hi Deepak,

Refer following topic in the TRM:

So that means A0 from the controller EMIF will always give least significant bit of 32-bit word. That means this A0 bit of EMIF will only increase interns of 32-bit words only.

Now if you understand correctly, now you need one more extra line to address halfwords in the 16bit memory right.

For example:

Assume you have a 16-bit memory device with following data:

As it is a 16-bit memory, that means each cell consists of 16-bit data, so that means the address 0x00000000 consists of 0xAAAA 16-bit data and then next address 0x00000001 consists of 0xBBBB data and so on right.

So now to access this memory regions you wrote a code and accessing like below:

As shown above to access any 16-bit word from the code, but this address is not directly moved to the EMIF lines instead of the least significant bit of the address you are accessing will only move to the BA[1] instead of A0, and A1 in your program will be moved to the A0 at EMIF and this continuous.

 If you verify carefully above addresses at EMIF, the least significant bit of the EMIF address that is A0 is only increasing for every 32-bit access, that means A0 of the controller EMIF will always point to the least significant bit of the 32-bit data.

Similarly, this is how accessing happens on 8-bit  memory:

As you can see now the least two significant bits of the accessing address will get moved on to BA[1] and BA[0], remaining address lines of programming from A2 onwards will get moved to the A0 of the EMIF lines. If you verify now also the A0 of the EMIF line is only increasing for every 32-bit access of the slave memory. That means EMIF A0 pointing the least significant bit of the 32-bit data.

--
Thanks & regards,
Jagadish.