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AM2634-Q1: PC/104 interface

Part Number: AM2634-Q1

Tool/software:

Dear TI Support,

I am working on a Battery Management System (BMS) design and using the AM2634-Q1 microcontroller. I am quite new to hardware system design, so I would really appreciate your guidance.

I need to interface the AM2634-Q1's GPMC (General-Purpose Memory Controller) interface to a PC/104-based peripheral. Could you please help me understand: -

     1. How can I connect the GPMC interface to a PC/104 bus system?

     2. Is GPMC compatible with standard PC/104 (ISA or PCI) signals?

     3. Do I need a bridge or additional logic between GPMC and PC/104?

     4. Are there any reference designs, application notes, or guidelines?

     5. What are the signal voltage levels on GPMC, and do I need level shifting to meet PC/104 specifications?

     6. How do I configure the GPMC in the AM2634-Q1 to operate in a mode compatible with memory-mapped peripherals like those used on PC/104 boards?

     7. Is there software/driver support in the SDK or MCU+ SDK to access PC/104 peripherals via GPMC?

     8. Any TI recommendations for interfacing with legacy parallel buses like PC/104 or ISA using modern MCUs like the AM2634-Q1?

     9. Are there any limitations or risks (electrical or timing-wise) that I should be aware of when trying to achieve this communication?

  • Hi Shivam,

    Thank you for the query!!

    We have so far not tested PC/104 interfacing with AM263x GPMC. 
    Please allow me to come back on this after discussing with GPMC experts / Systems team.


    Thanks & Regards,
    Rijohn

  • Hi Shivam,

    Thank you for your patience.

    GPMC in AM263x device has 21 address lines , 16 data lines for interfacing 16-bit memory. The signals used in GPMS IP are present in AM263x Datasheet section 6.3.12 GPMC. 

    Are there any reference designs, application notes, or guidelines?

    Interface level connections and corresponding signal used in various modes of GPMC are present in 13.3.1.2.1 GPMC Modes and Table 13-161. GPMC Pin Multiplexing Options in AM263x TRM

     5. What are the signal voltage levels on GPMC,


    In AM263x GPMC signals operate in 3.3V.

     6. How do I configure the GPMC in the AM2634-Q1 to operate in a mode compatible with memory-mapped peripherals like those used on PC/104 boards?

    From what i understand it should be similar to interfacing of SRAM / PSRAM. For this we will have to configure various GPMC Timing Parameters for the corresponding chip select. Please refer to TRM section 13.3.1.4.6.1 GPMC I/O Configuration Setting and 13.3.1.4.8 GPMC Timing Setting for more details.

    7. Is there software/driver support in the SDK or MCU+ SDK to access PC/104 peripherals via GPMC?

    No, currently we have a GPMC-PSRAM example in MCU_PLUS_SDK. Path:  C:\ti\mcu_plus_sdk_am263x_10_02_00_13\examples\drivers\gpmc\gpmc_psram_io

    PC/104-based peripheral


    Can you please share the interface level detail of this peripherals?




    Thanks & Regards,
    Rijohn